Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46510 )
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver
This CL would remove these calls from fsp 2.0.
BUG=b:150502246 BRANCH=None TEST=make sure memory training still works on nami
Change-Id: I3088ca6927c7dbc65386c13e868afa0462086937 Signed-off-by: Shelley Chen shchen@google.com --- M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/mrc_cache/mrc_cache.c 2 files changed, 7 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/46510/1
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 09aad6b..68cc121 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -19,18 +19,12 @@ #include <symbols.h> #include <timestamp.h> #include <security/vboot/vboot_common.h> -#include <security/vboot/mrc_cache_hash_tpm.h> #include <security/tpm/tspi.h> #include <vb2_api.h> #include <types.h>
static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t));
-/* TPM MRC hash functionality depends on vboot starting before memory init. */ -_Static_assert(!CONFIG(MRC_SAVE_HASH_IN_TPM) || - CONFIG(VBOOT_STARTS_IN_BOOTBLOCK), - "for TPM MRC hash functionality, vboot must start in bootblock"); - static void save_memory_training_data(bool s3wake, uint32_t fsp_version) { size_t mrc_data_size; @@ -54,9 +48,6 @@ if (mrc_cache_stash_data(MRC_TRAINING_DATA, fsp_version, mrc_data, mrc_data_size) < 0) printk(BIOS_ERR, "Failed to stash MRC data\n"); - - if (CONFIG(MRC_SAVE_HASH_IN_TPM)) - mrc_cache_update_hash(mrc_data, mrc_data_size); }
static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) @@ -121,10 +112,6 @@ if (data == NULL) return;
- if (CONFIG(MRC_SAVE_HASH_IN_TPM) && - !mrc_cache_verify_hash(data, mrc_size)) - return; - /* MRC cache found */ arch_upd->NvsBufferPtr = data;
diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c index a083655..30384e8 100644 --- a/src/drivers/mrc_cache/mrc_cache.c +++ b/src/drivers/mrc_cache/mrc_cache.c @@ -10,6 +10,7 @@ #include <fmap.h> #include <ip_checksum.h> #include <region_file.h> +#include <security/vboot/mrc_cache_hash_tpm.h> #include <security/vboot/vboot_common.h> #include <spi_flash.h>
@@ -185,6 +186,10 @@ return -1; }
+ // NOTE: we need to create the hash from both data and metadata values + if (CONFIG(MRC_SAVE_HASH_IN_TPM) && !mrc_cache_verify_hash(data, data_size)) + return -1; + return 0; }
@@ -443,6 +448,8 @@ } else { printk(BIOS_DEBUG, "MRC: updated '%s'.\n", cr->name); log_event_cache_update(cr->elog_slot, UPDATE_SUCCESS); + if (CONFIG(MRC_SAVE_HASH_IN_TPM)) + mrc_cache_update_hash(new_data, new_data_size); } }
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46510 )
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
Patch Set 1:
(3 comments)
https://review.coreboot.org/c/coreboot/+/46510/1/src/drivers/mrc_cache/mrc_c... File src/drivers/mrc_cache/mrc_cache.c:
https://review.coreboot.org/c/coreboot/+/46510/1/src/drivers/mrc_cache/mrc_c... PS1, Line 189: // NOTE: we need to create the hash from both data and metadata values code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46510/1/src/drivers/mrc_cache/mrc_c... PS1, Line 190: if (CONFIG(MRC_SAVE_HASH_IN_TPM) && !mrc_cache_verify_hash(data, data_size)) code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/46510/1/src/drivers/mrc_cache/mrc_c... PS1, Line 190: if (CONFIG(MRC_SAVE_HASH_IN_TPM) && !mrc_cache_verify_hash(data, data_size)) please, no spaces at the start of a line
Hello build bot (Jenkins), Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46510
to look at the new patch set (#3).
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver
This CL would remove these calls from fsp 2.0.
BUG=b:150502246 BRANCH=None TEST=make sure memory training still works on nami
Change-Id: I3088ca6927c7dbc65386c13e868afa0462086937 Signed-off-by: Shelley Chen shchen@google.com --- M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/mrc_cache/mrc_cache.c 2 files changed, 6 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/46510/3
Hello build bot (Jenkins), Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46510
to look at the new patch set (#4).
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver
This CL would remove these calls from fsp 2.0.
BUG=b:150502246 BRANCH=None TEST=make sure memory training still works on nami
Change-Id: I3088ca6927c7dbc65386c13e868afa0462086937 Signed-off-by: Shelley Chen shchen@google.com --- M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/mrc_cache/mrc_cache.c 2 files changed, 6 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/46510/4
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46510 )
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46510/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46510/3//COMMIT_MSG@9 PS3, Line 9: This CL would remove these calls from fsp 2.0. Can you please add here that for platforms that select MRC_STASH_TO_CBMEM, updating of TPM space is moved from romstage to ramstage (i.e. instead of updating the TPM space when data is stashed to CBMEM, it now happens when data is being written back to SPI flash).
https://review.coreboot.org/c/coreboot/+/46510/3/src/drivers/mrc_cache/mrc_c... File src/drivers/mrc_cache/mrc_cache.c:
https://review.coreboot.org/c/coreboot/+/46510/3/src/drivers/mrc_cache/mrc_c... PS3, Line 451: mrc_cache_update_hash Because of this change you will have to add mrc_cache_hash_tpm.c to ramstage as well.
Hello build bot (Jenkins), Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46510
to look at the new patch set (#5).
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver
This CL would remove these calls from fsp 2.0. Platforms that select MRC_STASH_TO_CBMEM, updating the TPM NVRAM space is moves from romstage (when data stashed to CBMEM) to ramstage (when data is written back to SPI flash.
BUG=b:150502246 BRANCH=None TEST=make sure memory training still works on nami
Change-Id: I3088ca6927c7dbc65386c13e868afa0462086937 Signed-off-by: Shelley Chen shchen@google.com --- M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/mrc_cache/mrc_cache.c M src/security/vboot/Makefile.inc 3 files changed, 7 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/46510/5
Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46510 )
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/46510/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46510/3//COMMIT_MSG@9 PS3, Line 9: This CL would remove these calls from fsp 2.0.
Can you please add here that for platforms that select MRC_STASH_TO_CBMEM, updating of TPM space is […]
Done
https://review.coreboot.org/c/coreboot/+/46510/3/src/drivers/mrc_cache/mrc_c... File src/drivers/mrc_cache/mrc_cache.c:
https://review.coreboot.org/c/coreboot/+/46510/3/src/drivers/mrc_cache/mrc_c... PS3, Line 451: mrc_cache_update_hash
Because of this change you will have to add mrc_cache_hash_tpm.c to ramstage as well.
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46510 )
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
Patch Set 5: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/46510/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46510/5//COMMIT_MSG@10 PS5, Line 10: moves nit: moved
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Andrey Petrov, Aaron Durbin, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46510
to look at the new patch set (#6).
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver
This CL would remove these calls from fsp 2.0. Platforms that select MRC_STASH_TO_CBMEM, updating the TPM NVRAM space is moved from romstage (when data stashed to CBMEM) to ramstage (when data is written back to SPI flash.
BUG=b:150502246 BRANCH=None TEST=make sure memory training still works on nami
Change-Id: I3088ca6927c7dbc65386c13e868afa0462086937 Signed-off-by: Shelley Chen shchen@google.com --- M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/mrc_cache/mrc_cache.c M src/security/vboot/Makefile.inc 3 files changed, 7 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/46510/6
Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46510 )
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46510/5//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/46510/5//COMMIT_MSG@10 PS5, Line 10: moves
nit: moved
Done
Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Andrey Petrov, Aaron Durbin, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46510
to look at the new patch set (#7).
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver
This CL would remove these calls from fsp 2.0. Platforms that select MRC_STASH_TO_CBMEM, updating the TPM NVRAM space is moved from romstage (when data stashed to CBMEM) to ramstage (when data is written back to SPI flash.
BUG=b:150502246 BRANCH=None TEST=make sure memory training still works on nami
Change-Id: I3088ca6927c7dbc65386c13e868afa0462086937 Signed-off-by: Shelley Chen shchen@google.com --- M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/mrc_cache/mrc_cache.c M src/security/vboot/Makefile.inc 3 files changed, 12 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/46510/7
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46510 )
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
Patch Set 7: Code-Review+2
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46510 )
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
Patch Set 7: Code-Review+2
Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46510 )
Change subject: mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver ......................................................................
mrc_cache: Move mrc_cache_*_hash functions into mrc_cache driver
This CL would remove these calls from fsp 2.0. Platforms that select MRC_STASH_TO_CBMEM, updating the TPM NVRAM space is moved from romstage (when data stashed to CBMEM) to ramstage (when data is written back to SPI flash.
BUG=b:150502246 BRANCH=None TEST=make sure memory training still works on nami
Change-Id: I3088ca6927c7dbc65386c13e868afa0462086937 Signed-off-by: Shelley Chen shchen@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46510 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Julius Werner jwerner@chromium.org --- M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/mrc_cache/mrc_cache.c M src/security/vboot/Makefile.inc 3 files changed, 12 insertions(+), 13 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Julius Werner: Looks good to me, approved
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 09aad6b..68cc121 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -19,18 +19,12 @@ #include <symbols.h> #include <timestamp.h> #include <security/vboot/vboot_common.h> -#include <security/vboot/mrc_cache_hash_tpm.h> #include <security/tpm/tspi.h> #include <vb2_api.h> #include <types.h>
static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(sizeof(uint64_t));
-/* TPM MRC hash functionality depends on vboot starting before memory init. */ -_Static_assert(!CONFIG(MRC_SAVE_HASH_IN_TPM) || - CONFIG(VBOOT_STARTS_IN_BOOTBLOCK), - "for TPM MRC hash functionality, vboot must start in bootblock"); - static void save_memory_training_data(bool s3wake, uint32_t fsp_version) { size_t mrc_data_size; @@ -54,9 +48,6 @@ if (mrc_cache_stash_data(MRC_TRAINING_DATA, fsp_version, mrc_data, mrc_data_size) < 0) printk(BIOS_ERR, "Failed to stash MRC data\n"); - - if (CONFIG(MRC_SAVE_HASH_IN_TPM)) - mrc_cache_update_hash(mrc_data, mrc_data_size); }
static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) @@ -121,10 +112,6 @@ if (data == NULL) return;
- if (CONFIG(MRC_SAVE_HASH_IN_TPM) && - !mrc_cache_verify_hash(data, mrc_size)) - return; - /* MRC cache found */ arch_upd->NvsBufferPtr = data;
diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c index a083655..95abc4f 100644 --- a/src/drivers/mrc_cache/mrc_cache.c +++ b/src/drivers/mrc_cache/mrc_cache.c @@ -10,6 +10,7 @@ #include <fmap.h> #include <ip_checksum.h> #include <region_file.h> +#include <security/vboot/mrc_cache_hash_tpm.h> #include <security/vboot/vboot_common.h> #include <spi_flash.h>
@@ -82,6 +83,11 @@ &variable_data, };
+/* TPM MRC hash functionality depends on vboot starting before memory init. */ +_Static_assert(!CONFIG(MRC_SAVE_HASH_IN_TPM) || + CONFIG(VBOOT_STARTS_IN_BOOTBLOCK), + "for TPM MRC hash functionality, vboot must start in bootblock"); + static int lookup_region_by_name(const char *name, struct region *r) { if (fmap_locate_area(name, r) == 0) @@ -185,6 +191,9 @@ return -1; }
+ if (CONFIG(MRC_SAVE_HASH_IN_TPM) && !mrc_cache_verify_hash(data, data_size)) + return -1; + return 0; }
@@ -443,6 +452,8 @@ } else { printk(BIOS_DEBUG, "MRC: updated '%s'.\n", cr->name); log_event_cache_update(cr->elog_slot, UPDATE_SUCCESS); + if (CONFIG(MRC_SAVE_HASH_IN_TPM)) + mrc_cache_update_hash(new_data, new_data_size); } }
diff --git a/src/security/vboot/Makefile.inc b/src/security/vboot/Makefile.inc index d4dabe2..4cf8090 100644 --- a/src/security/vboot/Makefile.inc +++ b/src/security/vboot/Makefile.inc @@ -119,6 +119,7 @@ postcar-y += common.c
romstage-$(CONFIG_MRC_SAVE_HASH_IN_TPM) += mrc_cache_hash_tpm.c +ramstage-$(CONFIG_MRC_SAVE_HASH_IN_TPM) += mrc_cache_hash_tpm.c
ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)