Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40358 )
Change subject: vboot: remove leftover TPM_PCR_GBB constants ......................................................................
vboot: remove leftover TPM_PCR_GBB constants
These constants were left behind after the code using them was relocated in CB:34510.
BUG=b:124141368, chromium:972956 TEST=make clean && make test-abuild BRANCH=none
Change-Id: I6ce7c969a9e9bdf6cdce3343ba666a08b3521f27 Signed-off-by: Joel Kitching kitching@google.com --- M src/security/vboot/secdata_tpm.c 1 file changed, 0 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/40358/1
diff --git a/src/security/vboot/secdata_tpm.c b/src/security/vboot/secdata_tpm.c index 0ae9562..87c33a5 100644 --- a/src/security/vboot/secdata_tpm.c +++ b/src/security/vboot/secdata_tpm.c @@ -56,9 +56,6 @@ } \ } while (0)
-#define TPM_PCR_GBB_FLAGS_NAME "GBB flags" -#define TPM_PCR_GBB_HWID_NAME "GBB HWID" - static uint32_t safe_write(uint32_t index, const void *data, uint32_t length);
static uint32_t read_space_firmware(struct vb2_context *ctx)
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40358 )
Change subject: vboot: remove leftover TPM_PCR_GBB constants ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40358/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40358/1//COMMIT_MSG@10 PS1, Line 10: was relocated in CB:34510. Please also add the commit hash and summary.
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40358 )
Change subject: vboot: remove leftover TPM_PCR_GBB constants ......................................................................
Patch Set 1: Code-Review+2
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40358 )
Change subject: vboot: remove leftover TPM_PCR_GBB constants ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/40358/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40358/1//COMMIT_MSG@10 PS1, Line 10: was relocated in CB:34510.
Please also add the commit hash and summary.
Why? The reason we have this short format is that we don't need to bloat commit messages with large hashes all the time.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40358 )
Change subject: vboot: remove leftover TPM_PCR_GBB constants ......................................................................
vboot: remove leftover TPM_PCR_GBB constants
These constants were left behind after the code using them was relocated in CB:34510.
BUG=b:124141368, chromium:972956 TEST=make clean && make test-abuild BRANCH=none
Change-Id: I6ce7c969a9e9bdf6cdce3343ba666a08b3521f27 Signed-off-by: Joel Kitching kitching@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/40358 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Duncan Laurie dlaurie@chromium.org Reviewed-by: Julius Werner jwerner@chromium.org --- M src/security/vboot/secdata_tpm.c 1 file changed, 0 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved Julius Werner: Looks good to me, approved
diff --git a/src/security/vboot/secdata_tpm.c b/src/security/vboot/secdata_tpm.c index b60a1bb..c052989 100644 --- a/src/security/vboot/secdata_tpm.c +++ b/src/security/vboot/secdata_tpm.c @@ -56,9 +56,6 @@ } \ } while (0)
-#define TPM_PCR_GBB_FLAGS_NAME "GBB flags" -#define TPM_PCR_GBB_HWID_NAME "GBB HWID" - static uint32_t safe_write(uint32_t index, const void *data, uint32_t length);
static uint32_t read_space_firmware(struct vb2_context *ctx)
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40358 )
Change subject: vboot: remove leftover TPM_PCR_GBB constants ......................................................................
Patch Set 2:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/2478 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/2477 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/2476 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/2475
Please note: This test is under development and might not be accurate at all!