[XS] Change in coreboot[main]: soc/mediatek/mt8196: Add GCE ddren sel control to mminfra

[Jason-jh Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin.

Jason-jh Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86027?usp=email )

Change subject: soc/mediatek/mt8196: Add GCE ddren sel control to mminfra
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Patch Set 3:

(4 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/86027/comment/b91d6f3d_6015d4ae?usp... :
PS1, Line 10: WLA
> What is WLA ?

Done

https://review.coreboot.org/c/coreboot/+/86027/comment/a4165e8f_9c3d27db?usp... :
PS1, Line 12: power
> whenever MMINFRA is powering on.

Done

https://review.coreboot.org/c/coreboot/+/86027/comment/8a7321cd_50978329?usp... :
PS1, Line 13: get hang
> hang

Done

https://review.coreboot.org/c/coreboot/+/86027/comment/3f1816c3_50298fa5?usp... :
PS1, Line 16: TEST=Build pass
> The issue looks serious. The TEST should not be build pass.

Done