Change in coreboot[master]: nb/amd/agesa/family14: Use generic allocation functions for PCI domain

[Michał Żygowski (Code Review)]

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/53954 )

Change subject: nb/amd/agesa/family14: Use generic allocation functions for PCI domain
......................................................................

nb/amd/agesa/family14: Use generic allocation functions for PCI domain

Move the DRAM reporting to read_resoures function before the resource
are being set. Use generic PCI domain resource allocation functions
to read and set domain resources.

TEST=boot Debian with Linux 4.14 on apu1 2GB

oSigned-off-by: Michał Żygowski 
Change-Id: Ie322c7eee443646a5690920c1e06851ee5fdfac3
---
M src/northbridge/amd/agesa/family14/northbridge.c
1 file changed, 5 insertions(+), 59 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/53954/1

diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index f8e9863..ec507f3 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -47,13 +47,6 @@
    }
 }

-static u32 f1_read_config32(unsigned int reg)
-{
-	if (fx_devs == 0)
-		get_fx_devs();
-	return pci_read_config32(__f1_dev[0], reg);
-}
-
 static void f1_write_config32(unsigned int reg, u32 value)
 {
    int i;
@@ -223,48 +216,6 @@

static void domain_read_resources(struct device *dev)
 {
-	unsigned int reg;
-
-	printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__);
-
-	/* Find the already assigned resource pairs */
-	get_fx_devs();
-	for (reg = 0x80; reg <= 0xc0; reg += 0x08) {
-		u32 base, limit;
-		base = f1_read_config32(reg);
-		limit = f1_read_config32(reg + 0x04);
-		/* Is this register allocated? */
-		if ((base & 3) != 0) {
-			unsigned int nodeid, reg_link;
-			struct device *reg_dev;
-			if (reg < 0xc0) {	// mmio
-				nodeid = (limit & 0xf) + (base & 0x30);
-			} else {	// io
-				nodeid = (limit & 0xf) + ((base >> 4) & 0x30);
-			}
-			reg_link = (limit >> 4) & 7;
-			reg_dev = __f0_dev[nodeid];
-			if (reg_dev) {
-				/* Reserve the resource  */
-				struct resource *res;
-				res =
-				    new_resource(reg_dev,
-						 IOINDEX(0x1000 + reg,
-							 reg_link));
-				if (res) {
-					res->flags = 1;
-				}
-			}
-		}
-	}
-	/* FIXME: do we need to check extend conf space?
-	   I don't believe that much preset value */
-
-	pci_domain_read_resources(dev);
-}
-
-static void domain_set_resources(struct device *dev)
-{
    printk(BIOS_DEBUG, "\nFam14h - %s\n", __func__);
    printk(BIOS_DEBUG, "  amsr - incoming dev = %p\n", dev);

@@ -277,6 +228,8 @@
    u32 reset_memhole = 1;
 #endif

+	pci_domain_read_resources(dev);
+
    pci_tolm = 0xffffffffUL;
    for (link = dev->link_list; link; link = link->next) {
    	pci_tolm = my_find_pci_tolm(link, pci_tolm);
@@ -361,13 +314,6 @@
    printk(BIOS_DEBUG, "  adsr - mmio_basek = %lx.\n", mmio_basek);

add_uma_resource_below_tolm(dev, 7);
-
-	for (link = dev->link_list; link; link = link->next) {
-		if (link->children) {
-			assign_resources(link);
-		}
-	}
-	printk(BIOS_DEBUG, "  adsr - leaving this lovely routine.\n");
 }

static const char *domain_acpi_name(const struct device *dev)
@@ -568,9 +514,9 @@

static struct device_operations pci_domain_ops = {
    .read_resources = domain_read_resources,
-	.set_resources = domain_set_resources,
-	.scan_bus = pci_domain_scan_bus,
-	.acpi_name = domain_acpi_name,
+	.set_resources	= pci_domain_set_resources,
+	.scan_bus       = pci_domain_scan_bus,
+	.acpi_name      = domain_acpi_name,
 };

static struct device_operations cpu_bus_ops = {