[M] Change in coreboot[main]: soc/intel/xeon_sp: Support multiple PCI segment groups

[Johnny Lin (Code Review)]

Attention is currently required from: Annie Chen, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Naresh Solanki, Nill Ge, Patrick Rudolph, Shuo Liu, TangYiwei, Tim Chu.

Johnny Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79878?usp=email )

Change subject: soc/intel/xeon_sp: Support multiple PCI segment groups
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Patch Set 2:

(1 comment)

Patchset:

PS2: 
Need to give a default value for CONFIG_ECAM_SEGMENT_COUNT?
src/soc/intel/xeon_sp/spr/soc_util.c:150:22: error: 'CONFIG_ECAM_SEGMENT_COUNT' undeclared (first use in this function); did you mean 'CONFIG_IRQ_SLOT_COUNT'?
  150 |         assert(seg < CONFIG_ECAM_SEGMENT_COUNT);
      |                      ^~~~~~~~~~~~~~~~~~~~~~~~~