Change in coreboot[master]: soc/intel/alderlake: Add GPIO definition for CPU PCIe vGPIO - coreboot-gerrit

3 May 2021


      Attention is currently required from: Furquan Shaikh.
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52783 )
Change subject: soc/intel/alderlake: Add GPIO definition for CPU PCIe vGPIO
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Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52783/comment/49d98781_e43a4ade 
PS5, Line 11: ,c
...
nit: space after comma
Done
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I481ea7e3ba948bf6d37b97d08c675a18ee68125d
Gerrit-Change-Number: 52783
Gerrit-PatchSet: 6
Gerrit-Owner: Maulik V Vaghela maulik.v.vaghela@intel.com
Gerrit-Reviewer: Bernardo Perez Priego bernardo.perez.priego@intel.com
Gerrit-Reviewer: Bora Guvendik bora.guvendik@intel.com
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