[XS] Change in coreboot[main]: soc/intel/xeon_sp: Include soc_util.h in Xeon-SP common codes

[Nico Huber (Code Review)]

Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81229?usp=email )

(

6 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/intel/xeon_sp: Include soc_util.h in Xeon-SP common codes
......................................................................

soc/intel/xeon_sp: Include soc_util.h in Xeon-SP common codes

Different SoC generations might have different FSP header files. It is
recommended to put these uncommon header files in soc_util.h so that
Xeon-SP codes refer to soc_util.h to include them in a clean way.

TEST=intel/archercity CRB

Change-Id: Icfc20921efe00bc69b0c16c665f65f5baae4c309
Signed-off-by: Shuo Liu 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81229
Reviewed-by: Patrick Rudolph 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/xeon_sp/include/soc/chip_common.h
M src/soc/intel/xeon_sp/include/soc/util.h
2 files changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Patrick Rudolph: Looks good to me, approved

diff --git a/src/soc/intel/xeon_sp/include/soc/chip_common.h b/src/soc/intel/xeon_sp/include/soc/chip_common.h
index 2b2d5de..68dc4f9 100644
--- a/src/soc/intel/xeon_sp/include/soc/chip_common.h
+++ b/src/soc/intel/xeon_sp/include/soc/chip_common.h
@@ -5,7 +5,7 @@

#include <device/device.h>
 #include <device/path.h>
-#include <hob_iiouds.h>
+#include <soc/soc_util.h>

union xeon_domain_path {
    unsigned int domain_path;
diff --git a/src/soc/intel/xeon_sp/include/soc/util.h b/src/soc/intel/xeon_sp/include/soc/util.h
index db66fcb..eff8c08 100644
--- a/src/soc/intel/xeon_sp/include/soc/util.h
+++ b/src/soc/intel/xeon_sp/include/soc/util.h
@@ -4,7 +4,7 @@
 #define _XEON_SP_SOC_UTIL_H_

#include <cpu/x86/msr.h>
-#include <hob_iiouds.h>
+#include <soc/soc_util.h>

#define MEM_ADDR_64MB_SHIFT_BITS 26