Attention is currently required from: Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph, EricR Lai. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59509 )
Change subject: soc/intel/common/thermal: Refactor thermal block to improve reusability ......................................................................
Patch Set 6:
(1 comment)
File src/soc/intel/common/block/thermal/Kconfig:
https://review.coreboot.org/c/coreboot/+/59509/comment/647757fb_c039a37c PS4, Line 7: config SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV : bool : default n : select SOC_INTEL_COMMON_BLOCK_THERMAL : help : This option allows to configure PCH thermal registers using Thermal PCI device : for chipsets till Ice Lake PCH. : : config SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC : bool : default n : select SOC_INTEL_COMMON_BLOCK_THERMAL : help : This option allows to configure PCH thermal registers using PMC PWRMBASE : for chipsets since Tiger Lake PCH.
Another way could be […]
Meh, looks like Kconfig doesn't like my idea... I'd simply use a preprocessor check inside `thermal.h`:
#if CONFIG(SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV) && CONFIG(SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC) #error "<insert error message here>" #endif
Or, we could define the `GET_LTT_VALUE` macro independently for each case:
#if CONFIG(SOC_INTEL_COMMON_BLOCK_THERMAL_PCI_DEV) /* Trip Point Temp = (LTT / 2 - 50 degree C) */ #define GET_LTT_VALUE(x) (((x) + 50) * (2)) #endif #if CONFIG(SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC) /* * Trip Point = T2L | T1L | T0L where T2L > T1L > T0L * T2L = Bit 28:20 * T1L = Bit 18:10 * T0L = Bit 8:0 */ #define GET_LTT_VALUE(x) (((x) + 10) << 20 | ((x) + 5) << 10 | (x)) #endif
This way, there will be a macro redefinition error if both symbols are enabled. If none of them is enabled, something will be undefined.