Change in coreboot[master]: soc/amd: introduce and use common IOAPIC IDs

[Felix Held (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Nico Huber, Raul Rangel, Marshall Dawson,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/50575

to look at the new patch set (#5).

Change subject: soc/amd: introduce and use common IOAPIC IDs
......................................................................

soc/amd: introduce and use common IOAPIC IDs

Stoneyridge used CONFIG_MAX_CPUS and CONFIG_MAX_CPUS + 1 directly as
IOAPIC IDs and Picasso had Kconfig options to configure that, but still
used the common SMBus controller code that used CONFIG_MAX_CPUS as ID
for the FCH IOAPIC. If a board overrides the PICASSO_FCH_IOAPIC_ID
Kconfig option to a value that isn't CONFIG_MAX_CPUS, we'll get a
mismatch between the ID that gets written into the FCH IOAPIC register
and the ID in the corresponding ACPI table. In order to avoid that add
defines to each SOC's southbridge.c and use them in all soc/amd code.

Change-Id: I94f54d3e6d284391ae6ecad00a76de18dcdd4669
Signed-off-by: Felix Held 
---
A src/soc/amd/common/block/include/amdblocks/ioapic.h
M src/soc/amd/common/block/smbus/sm.c
M src/soc/amd/picasso/Kconfig
M src/soc/amd/picasso/acpi.c
M src/soc/amd/picasso/agesa_acpi.c
M src/soc/amd/picasso/fsp_params.c
M src/soc/amd/picasso/root_complex.c
M src/soc/amd/stoneyridge/acpi.c
M src/soc/amd/stoneyridge/northbridge.c
9 files changed, 27 insertions(+), 37 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/50575/5