Change in coreboot[master]: soc/intel/cannonlake: Add additional UPD

[Philipp Deppenwiese (Code Review)]

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/29324 )

Change subject: soc/intel/cannonlake: Add additional UPD
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Patch Set 5:

@intel guys do you have some info about the performance and internals what it does? Just changing the seed of the scrambler or overwriting the whole memory. If so where does the random come from?