Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13783
-gerrit
commit 258e49b8697df2ee2909b08c6ab6886dc007cc5c Author: Stefan Reinauer stefan.reinauer@coreboot.org Date: Wed Feb 24 13:25:42 2016 -0800
northbridge/intel/i82830: Unify UDELAY selection
Instead of manually including udelay_io.c in each romstage, select UDELAY_IO for all i830 boards in the chipset.
Change-Id: I0a63ddd3c5e43ea65f776385f54eceb6569751ac Signed-off-by: Stefan Reinauer stefan.reinauer@coreboot.org --- src/mainboard/rca/rm4100/Kconfig | 1 - src/mainboard/rca/rm4100/gpio.c | 2 ++ src/mainboard/rca/rm4100/romstage.c | 1 - src/mainboard/thomson/ip1000/Kconfig | 1 - src/mainboard/thomson/ip1000/gpio.c | 2 ++ src/mainboard/thomson/ip1000/romstage.c | 1 - src/northbridge/intel/i82830/Kconfig | 1 + 7 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/rca/rm4100/Kconfig b/src/mainboard/rca/rm4100/Kconfig index a6f216e..81cfc7b 100644 --- a/src/mainboard/rca/rm4100/Kconfig +++ b/src/mainboard/rca/rm4100/Kconfig @@ -7,7 +7,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOUTHBRIDGE_INTEL_I82801DX select SUPERIO_SMSC_SMSCSUPERIO select HAVE_PIRQ_TABLE - select UDELAY_TSC select BOARD_ROMSIZE_KB_1024
config MAINBOARD_DIR diff --git a/src/mainboard/rca/rm4100/gpio.c b/src/mainboard/rca/rm4100/gpio.c index 89c86a3..a2dac0a 100644 --- a/src/mainboard/rca/rm4100/gpio.c +++ b/src/mainboard/rca/rm4100/gpio.c @@ -14,6 +14,8 @@ * GNU General Public License for more details. */
+#include <delay.h> + #define PME_DEV PNP_DEV(0x2e, 0x0a) #define PME_IO_BASE_ADDR 0x800 /* Runtime register base address */ #define ICH_IO_BASE_ADDR 0x00000500 /* GPIO base address register */ diff --git a/src/mainboard/rca/rm4100/romstage.c b/src/mainboard/rca/rm4100/romstage.c index bec4be8..296d072 100644 --- a/src/mainboard/rca/rm4100/romstage.c +++ b/src/mainboard/rca/rm4100/romstage.c @@ -19,7 +19,6 @@ #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> -#include "drivers/pc80/udelay_io.c" #include <console/console.h> #include <lib.h> #include <superio/smsc/smscsuperio/smscsuperio.h> diff --git a/src/mainboard/thomson/ip1000/Kconfig b/src/mainboard/thomson/ip1000/Kconfig index f775e2b..1c21ace 100644 --- a/src/mainboard/thomson/ip1000/Kconfig +++ b/src/mainboard/thomson/ip1000/Kconfig @@ -7,7 +7,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOUTHBRIDGE_INTEL_I82801DX select SUPERIO_SMSC_SMSCSUPERIO select HAVE_PIRQ_TABLE - select UDELAY_TSC select BOARD_ROMSIZE_KB_512 select INTEL_INT15
diff --git a/src/mainboard/thomson/ip1000/gpio.c b/src/mainboard/thomson/ip1000/gpio.c index 8a03f73..29c222d 100644 --- a/src/mainboard/thomson/ip1000/gpio.c +++ b/src/mainboard/thomson/ip1000/gpio.c @@ -14,6 +14,8 @@ * GNU General Public License for more details. */
+#include <delay.h> + #define PME_DEV PNP_DEV(0x2e, 0x0a) #define PME_IO_BASE_ADDR 0x800 /* Runtime register base address */ #define ICH_IO_BASE_ADDR 0x00000500 /* GPIO base address register */ diff --git a/src/mainboard/thomson/ip1000/romstage.c b/src/mainboard/thomson/ip1000/romstage.c index 2c69791..5bb7718 100644 --- a/src/mainboard/thomson/ip1000/romstage.c +++ b/src/mainboard/thomson/ip1000/romstage.c @@ -19,7 +19,6 @@ #include <device/pci_def.h> #include <arch/io.h> #include <device/pnp_def.h> -#include "drivers/pc80/udelay_io.c" #include <console/console.h> #include <lib.h> #include <superio/smsc/smscsuperio/smscsuperio.h> diff --git a/src/northbridge/intel/i82830/Kconfig b/src/northbridge/intel/i82830/Kconfig index 25a9e97..344dfed 100644 --- a/src/northbridge/intel/i82830/Kconfig +++ b/src/northbridge/intel/i82830/Kconfig @@ -2,6 +2,7 @@ config NORTHBRIDGE_INTEL_I82830 bool select HAVE_DEBUG_RAM_SETUP select LATE_CBMEM_INIT + select UDELAY_IO
choice prompt "Onboard graphics"
-
Stefan Reinauer