[S] Change in coreboot[main]: vendorcode/amd/opensil: Implement cbmem_top_chipset - coreboot-gerrit

29 Nov 2023


      Attention is currently required from: Arthur Heymans, Felix Held, Martin L Roth.
Felix Held has uploaded a new patch set (#8) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/76513?usp=email )
Change subject: vendorcode/amd/opensil: Implement cbmem_top_chipset
......................................................................
vendorcode/amd/opensil: Implement cbmem_top_chipset
Use an xPRF call to get the top of lower DRAM.
Organize Makefile to keep romstage/ramstage components separate.
Signed-off-by: Arthur Heymans arthur@aheymans.xyz
Signed-off-by: Martin Roth gaumless@gmail.com
Signed-off-by: Felix Held felix-coreboot@felixheld.de
Change-Id: I269663414f4d8e39eb218cd6348bfce7989a79f9
---
M src/vendorcode/amd/opensil/genoa_poc/Makefile.inc
A src/vendorcode/amd/opensil/genoa_poc/romstage.c
2 files changed, 28 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/76513/8
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Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I269663414f4d8e39eb218cd6348bfce7989a79f9
Gerrit-Change-Number: 76513
Gerrit-PatchSet: 8
Gerrit-Owner: Arthur Heymans arthur@aheymans.xyz
Gerrit-Reviewer: Felix Held felix-coreboot@felixheld.de
Gerrit-Reviewer: Martin L Roth gaumless@gmail.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-CC: Stefan Reinauer stefan.reinauer@coreboot.org
Gerrit-Attention: Martin L Roth gaumless@gmail.com
Gerrit-Attention: Arthur Heymans arthur@aheymans.xyz
Gerrit-Attention: Felix Held felix-coreboot@felixheld.de
Gerrit-MessageType: newpatchset