[XS] Change in coreboot[main]: mb/emulation/spike-riscv/uart.c: Update UART address

[Matt DeVillier (Code Review)]

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85852?usp=email )

(

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: mb/emulation/spike-riscv/uart.c: Update UART address
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mb/emulation/spike-riscv/uart.c: Update UART address

Spike Simulator commit 191634d2854d implemented a ns16550 serial device
which puts the base address at 0x10000000.

Tested: Start Spike Simulator and see that coreboot prints onto the UART.

Signed-off-by: Maximilian Brune 
Change-Id: I0e3db9d8b141c733bf609f906018096e3594ce83
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85852
Reviewed-by: Nicholas Chin 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/emulation/spike-riscv/uart.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Nicholas Chin: Looks good to me, approved

diff --git a/src/mainboard/emulation/spike-riscv/uart.c b/src/mainboard/emulation/spike-riscv/uart.c
index 4ea2466..e93594c 100644
--- a/src/mainboard/emulation/spike-riscv/uart.c
+++ b/src/mainboard/emulation/spike-riscv/uart.c
@@ -5,5 +5,5 @@

uintptr_t uart_platform_base(unsigned int idx)
 {
-	return (uintptr_t)0x02100000;
+	return (uintptr_t)0x10000000;
 }