Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51040 )
Change subject: soc/amd/cezanne/Makefile: move setting of PSP soft fuse bit 6 ......................................................................
soc/amd/cezanne/Makefile: move setting of PSP soft fuse bit 6
The PSP soft fuse bit 6 doesn't do what the comment above it says. See NDA document #55758 for details.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: Ic84cf6e1eee30af92cd700dc4bf78290143bf88b --- M src/soc/amd/cezanne/Makefile.inc 1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/51040/1
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 589e760..d631c63 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -102,10 +102,10 @@ PSP_BIOSBIN_DEST=$(shell $(READELF_bootblock) -l $(PSP_ELF_FILE) | grep LOAD | awk '{print $$3}')
# type = 0xb - See #55758 (NDA) for bit definitions. -PSP_SOFTFUSE_BITS += 28 +PSP_SOFTFUSE_BITS += 28 6
#hardcode post code to eSPI -PSP_SOFTFUSE_BITS += 15 6 +PSP_SOFTFUSE_BITS += 15
# Helper function to return a value with given bit set set-bit=$(call int-shift-left, 1 $(call _toint,$1))