Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Julian Schroeder has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56188 )
Change subject: soc/amd/cezanne: add ACPI CPPC support for AMD ......................................................................
Patch Set 4:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/56188/comment/26be41cf_37c6820f PS2, Line 7:
i'd add an "add" here
Done
https://review.coreboot.org/c/coreboot/+/56188/comment/fc8bb1b5_1c986c8b PS2, Line 9: CPPC
might be good to have the acronym expanded in the commit message text. […]
Done
Patchset:
PS4: I think I addressed all of Felix' comments...
File src/soc/amd/cezanne/cppc.h:
PS2:
this one should probably be moved to src/soc/amd/cezanne/include/soc/cppc. […]
Done
File src/soc/amd/cezanne/cppc_init.c:
PS2:
i'd move the contents of this file to cppc.c. […]
Done
https://review.coreboot.org/c/coreboot/+/56188/comment/31428efa_baed034c PS2, Line 33: msr.addrl = 0xc00102b0;
would be good to have defines for those instead of the magic msr numbers here
Done
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Julian Schroeder (Code Review)