Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33001
Change subject: soc/intel/common/cse: Don't use CAR_GLOBAL ......................................................................
soc/intel/common/cse: Don't use CAR_GLOBAL
All platforms using this code have NO_CAR_GLOBAL_MIGRATION.
Change-Id: If952ad8129e1fa6e45858cb77ec99c9fec55c4a6 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/common/block/cse/cse.c 1 file changed, 9 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/33001/1
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index 302e6de..6164580 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <arch/early_variables.h> #include <assert.h> #include <commonlib/helpers.h> #include <console/console.h> @@ -71,7 +70,7 @@
struct cse_device { uintptr_t sec_bar; -} g_cse CAR_GLOBAL; +} g_cse;
/* * Initialize the device with provided temporary BAR. If BAR is 0 use a @@ -80,7 +79,6 @@ */ void heci_init(uintptr_t tempbar) { - struct cse_device *cse = car_get_var_ptr(&g_cse); #if defined(__SIMPLE_DEVICE__) pci_devfn_t dev = PCH_DEV_CSE; #else @@ -89,7 +87,7 @@ u8 pcireg;
/* Assume it is already initialized, nothing else to do */ - if (cse->sec_bar) + if (g_cse.sec_bar) return;
/* Use default pre-ram bar */ @@ -111,7 +109,7 @@ pcireg |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; pci_write_config8(dev, PCI_COMMAND, pcireg);
- cse->sec_bar = tempbar; + g_cse.sec_bar = tempbar; }
/* Get HECI BAR 0 from PCI configuration space */ @@ -130,20 +128,18 @@
static uint32_t read_bar(uint32_t offset) { - struct cse_device *cse = car_get_var_ptr(&g_cse); /* Reach PCI config space to get BAR in case CAR global not available */ - if (!cse->sec_bar) - cse->sec_bar = get_cse_bar(); - return read32((void *)(cse->sec_bar + offset)); + if (!g_cse.sec_bar) + g_cse.sec_bar = get_cse_bar(); + return read32((void *)(g_cse.sec_bar + offset)); }
static void write_bar(uint32_t offset, uint32_t val) { - struct cse_device *cse = car_get_var_ptr(&g_cse); /* Reach PCI config space to get BAR in case CAR global not available */ - if (!cse->sec_bar) - cse->sec_bar = get_cse_bar(); - return write32((void *)(cse->sec_bar + offset), val); + if (!g_cse.sec_bar) + g_cse.sec_bar = get_cse_bar(); + return write32((void *)(g_cse.sec_bar + offset), val); }
static uint32_t read_cse_csr(void)
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33001 )
Change subject: soc/intel/common/cse: Don't use CAR_GLOBAL ......................................................................
Patch Set 5: Code-Review+2
(1 comment)
https://review.coreboot.org/#/c/33001/5/src/soc/intel/common/block/cse/cse.c File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/#/c/33001/5/src/soc/intel/common/block/cse/cse.c... PS5, Line 71: struct cse_device { Could be static?
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33001 )
Change subject: soc/intel/common/cse: Don't use CAR_GLOBAL ......................................................................
soc/intel/common/cse: Don't use CAR_GLOBAL
All platforms using this code have NO_CAR_GLOBAL_MIGRATION.
Change-Id: If952ad8129e1fa6e45858cb77ec99c9fec55c4a6 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/33001 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/intel/common/block/cse/cse.c 1 file changed, 9 insertions(+), 13 deletions(-)
Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved
diff --git a/src/soc/intel/common/block/cse/cse.c b/src/soc/intel/common/block/cse/cse.c index e4fc6e4..7bd46ce 100644 --- a/src/soc/intel/common/block/cse/cse.c +++ b/src/soc/intel/common/block/cse/cse.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */
-#include <arch/early_variables.h> #include <assert.h> #include <commonlib/helpers.h> #include <console/console.h> @@ -71,7 +70,7 @@
static struct cse_device { uintptr_t sec_bar; -} g_cse CAR_GLOBAL; +} g_cse;
/* * Initialize the device with provided temporary BAR. If BAR is 0 use a @@ -80,7 +79,6 @@ */ void heci_init(uintptr_t tempbar) { - struct cse_device *cse = car_get_var_ptr(&g_cse); #if defined(__SIMPLE_DEVICE__) pci_devfn_t dev = PCH_DEV_CSE; #else @@ -89,7 +87,7 @@ u8 pcireg;
/* Assume it is already initialized, nothing else to do */ - if (cse->sec_bar) + if (g_cse.sec_bar) return;
/* Use default pre-ram bar */ @@ -111,7 +109,7 @@ pcireg |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; pci_write_config8(dev, PCI_COMMAND, pcireg);
- cse->sec_bar = tempbar; + g_cse.sec_bar = tempbar; }
/* Get HECI BAR 0 from PCI configuration space */ @@ -130,20 +128,18 @@
static uint32_t read_bar(uint32_t offset) { - struct cse_device *cse = car_get_var_ptr(&g_cse); /* Reach PCI config space to get BAR in case CAR global not available */ - if (!cse->sec_bar) - cse->sec_bar = get_cse_bar(); - return read32((void *)(cse->sec_bar + offset)); + if (!g_cse.sec_bar) + g_cse.sec_bar = get_cse_bar(); + return read32((void *)(g_cse.sec_bar + offset)); }
static void write_bar(uint32_t offset, uint32_t val) { - struct cse_device *cse = car_get_var_ptr(&g_cse); /* Reach PCI config space to get BAR in case CAR global not available */ - if (!cse->sec_bar) - cse->sec_bar = get_cse_bar(); - return write32((void *)(cse->sec_bar + offset), val); + if (!g_cse.sec_bar) + g_cse.sec_bar = get_cse_bar(); + return write32((void *)(g_cse.sec_bar + offset), val); }
static uint32_t read_cse_csr(void)
-
Arthur Heymans (Code Review) -
Kyösti Mälkki (Code Review)
-
Patrick Georgi (Code Review)