Change in ...coreboot[master]: TEMP: NOT FOR REVIEW qcs405: Enable bl31

[Name of user not set (Code Review)]

[e-mail] has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31899

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

TEMP: NOT FOR REVIEW qcs405: Enable bl31

Keeping it seperate to include bl31.elf till
we can build bl31 from repo

Change-Id: Icca865369358e54a042b2dce02072c05761194b2
Signed-off-by: Nitheesh Sekar 
Signed-off-by: Sricharan R 
---
M src/arch/arm64/Makefile.inc
M src/soc/qualcomm/qcs405/Makefile.inc
M src/soc/qualcomm/qcs405/soc.c
3 files changed, 16 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/31899/1

diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
index 6bb7196..bf2f01b 100644
--- a/src/arch/arm64/Makefile.inc
+++ b/src/arch/arm64/Makefile.inc
@@ -157,6 +157,8 @@

ifeq ($(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE),y)

+ifneq ($(CONFIG_SOC_QUALCOMM_QCS405),y)
+
 ifeq ($(CONFIG_ARM64_BL31_EXTERNAL_FILE),"")

BL31_SOURCE := $(top)/3rdparty/arm-trusted-firmware
@@ -235,6 +237,8 @@

endif # CONFIG_ARM64_USE_SECURE_OS

+endif # CONFIG_SOC_QUALCOMM_QCS405
+
 endif # CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE

endif # CONFIG_ARCH_RAMSTAGE_ARM64
diff --git a/src/soc/qualcomm/qcs405/Makefile.inc b/src/soc/qualcomm/qcs405/Makefile.inc
index 8c57f4a..b6ad8c2 100644
--- a/src/soc/qualcomm/qcs405/Makefile.inc
+++ b/src/soc/qualcomm/qcs405/Makefile.inc
@@ -107,4 +107,15 @@
    @printf "Generating: $(subst $(obj)/,,$(@))\n"
    cp $(objcbfs)/bootblock.raw.bin $(objcbfs)/bootblock.bin
 endif
+################################################################################
+BL31_FILE := $(QCS405_BLOB)/bl31.elf
+bl31_file := $(shell ls $(BL31_FILE))
+ifneq (,$(findstring $(BL31_FILE),$(bl31_file)))
+       BL31_CBFS := $(CONFIG_CBFS_PREFIX)/bl31
+       $(BL31_CBFS)-file := $(BL31_FILE)
+       $(BL31_CBFS)-type := payload
+       $(BL31_CBFS)-compression := none
+       cbfs-files-y += $(BL31_CBFS)
+endif
+################################################################################
 endif
diff --git a/src/soc/qualcomm/qcs405/soc.c b/src/soc/qualcomm/qcs405/soc.c
index ea52eb8..e22a3d8 100644
--- a/src/soc/qualcomm/qcs405/soc.c
+++ b/src/soc/qualcomm/qcs405/soc.c
@@ -23,7 +23,7 @@

void bootmem_platform_add_ranges(void)
 {
-	bootmem_add_range((uintptr_t)_dram_reserved, _dram_reserved_size, BM_MEM_BL31);
+	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
 }

static void soc_read_resources(struct device *dev)

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 2:

(1 comment)

https://review.coreboot.org/#/c/31899/2/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/2/src/soc/qualcomm/qcs405/soc.c@26 
PS2, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/#/c/31899/3/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/3/src/soc/qualcomm/qcs405/soc.c@26 
PS3, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/#/c/31899/4/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/4/src/soc/qualcomm/qcs405/soc.c@26 
PS4, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 5:

(1 comment)

https://review.coreboot.org/#/c/31899/5/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/5/src/soc/qualcomm/qcs405/soc.c@26 
PS5, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 6:

(1 comment)

https://review.coreboot.org/#/c/31899/6/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/6/src/soc/qualcomm/qcs405/soc.c@26 
PS6, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 7:

(1 comment)

https://review.coreboot.org/#/c/31899/7/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/7/src/soc/qualcomm/qcs405/soc.c@26 
PS7, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 8:

(1 comment)

https://review.coreboot.org/#/c/31899/8/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/8/src/soc/qualcomm/qcs405/soc.c@26 
PS8, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 9:

(1 comment)

https://review.coreboot.org/#/c/31899/9/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/9/src/soc/qualcomm/qcs405/soc.c@26 
PS9, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 10:

(1 comment)

https://review.coreboot.org/#/c/31899/10/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/10/src/soc/qualcomm/qcs405/soc.c@26 
PS10, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 11:

(1 comment)

https://review.coreboot.org/#/c/31899/11/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/11/src/soc/qualcomm/qcs405/soc.c@26 
PS11, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

[Nitheesh Sekar (Code Review)]

Hello Julius Werner, build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31899

to look at the new patch set (#12).

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

TEMP: NOT FOR REVIEW qcs405: Enable bl31

Keeping it seperate to include bl31.elf till
we can build bl31 from repo

Change-Id: Icca865369358e54a042b2dce02072c05761194b2
Signed-off-by: Nitheesh Sekar 
Signed-off-by: Sricharan R 
---
M src/arch/arm64/Makefile.inc
M src/soc/qualcomm/qcs405/Makefile.inc
M src/soc/qualcomm/qcs405/soc.c
3 files changed, 16 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/31899/12

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: TEMP: NOT FOR REVIEW qcs405: Enable bl31
......................................................................

Patch Set 12:

(1 comment)

https://review.coreboot.org/#/c/31899/12/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/12/src/soc/qualcomm/qcs405/soc.c@26 
PS12, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

Change in ...coreboot[master]: qcs405: Enable bl31

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: qcs405: Enable bl31
......................................................................

Patch Set 13:

(1 comment)

https://review.coreboot.org/#/c/31899/13/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/13/src/soc/qualcomm/qcs405/soc.c@26 
PS13, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

Change in ...coreboot[master]: qcs405: Enable bl31

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: qcs405: Enable bl31
......................................................................

Patch Set 14:

(1 comment)

https://review.coreboot.org/#/c/31899/14/src/soc/qualcomm/qcs405/soc.c 
File src/soc/qualcomm/qcs405/soc.c:

https://review.coreboot.org/#/c/31899/14/src/soc/qualcomm/qcs405/soc.c@26 
PS14, Line 26: 	bootmem_add_range((uintptr_t)_dram_reserved, REGION_SIZE(dram_reserved), BM_MEM_BL31);
line over 80 characters

Change in ...coreboot[master]: qcs405: Enable bl31

[Nitheesh Sekar (Code Review)]

Hello Julius Werner, build bot (Jenkins), Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31899

to look at the new patch set (#16).

Change subject: qcs405: Enable bl31
......................................................................

qcs405: Enable bl31

Keeping it seperate to include bl31.elf till
we can build bl31 from repo

Change-Id: Icca865369358e54a042b2dce02072c05761194b2
Signed-off-by: Nitheesh Sekar 
Signed-off-by: Sricharan R 
Signed-off-by: Nitheesh Sekar 
---
M src/arch/arm64/Makefile.inc
M src/soc/qualcomm/qcs405/Makefile.inc
2 files changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/31899/16

Change in coreboot[master]: qcs405: Enable bl31

[Patrick Georgi (Code Review)]

Patrick Georgi has uploaded a new patch set (#31) to the change originally created by Nitheesh Sekar. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: qcs405: Enable bl31
......................................................................

qcs405: Enable bl31

Keeping it seperate to include bl31.elf till
we can build bl31 from repo

Change-Id: Icca865369358e54a042b2dce02072c05761194b2
Signed-off-by: Nitheesh Sekar 
Signed-off-by: Sricharan R 
Signed-off-by: Nitheesh Sekar 
---
M src/arch/arm64/Makefile.inc
M src/soc/qualcomm/qcs405/Makefile.inc
2 files changed, 15 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/31899/31

Change in coreboot[master]: qcs405: Enable bl31

[Patrick Georgi (Code Review)]

Patrick Georgi has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/31899 )

Change subject: qcs405: Enable bl31
......................................................................

Abandoned

won't be finished here