Change in coreboot[master]: mb/lenovo/*/romstage: No need to specify board's model in comments

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/29180 )

Change subject: mb/lenovo/*/romstage: No need to specify board's model in comments
......................................................................

mb/lenovo/*/romstage: No need to specify board's model in comments

This is a cosmetic one. It just removes some board names from comments
since these functions sometimes are very similar, so no need to add
extra difference between them.

Change-Id: I26b9296b402d98bcf048580da51da7bbb0c237e4
Signed-off-by: Peter Lemenkov 
Reviewed-on: https://review.coreboot.org/29180
Tested-by: build bot (Jenkins) 
Reviewed-by: Angel Pons 
---
M src/mainboard/lenovo/t520/romstage.c
M src/mainboard/lenovo/t530/romstage.c
M src/mainboard/lenovo/x1_carbon_gen1/romstage.c
M src/mainboard/lenovo/x201/romstage.c
M src/mainboard/lenovo/x220/romstage.c
M src/mainboard/lenovo/x230/romstage.c
6 files changed, 6 insertions(+), 6 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c
index cdd0d45..c9a7f8e 100644
--- a/src/mainboard/lenovo/t520/romstage.c
+++ b/src/mainboard/lenovo/t520/romstage.c
@@ -63,7 +63,7 @@

void pch_enable_lpc(void)
 {
-	/* T520 EC Decode Range Port60/64, Port62/66 */
+	/* EC Decode Range Port60/64, Port62/66 */
    /* Enable EC, PS/2 Keyboard/Mouse */
    pci_write_config16(PCH_LPC_DEV, LPC_EN,
    		   CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);
diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c
index 68dd694..d7519ff 100644
--- a/src/mainboard/lenovo/t530/romstage.c
+++ b/src/mainboard/lenovo/t530/romstage.c
@@ -55,7 +55,7 @@

void pch_enable_lpc(void)
 {
-	/* X230 EC Decode Range Port60/64, Port62/66 */
+	/* EC Decode Range Port60/64, Port62/66 */
    /* Enable EC, PS/2 Keyboard/Mouse */
    pci_write_config16(PCH_LPC_DEV, LPC_EN,
    		   CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);
diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
index a34d1db..bd1c6a3 100644
--- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
+++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c
@@ -36,7 +36,7 @@

void pch_enable_lpc(void)
 {
-	/* X230 EC Decode Range Port60/64, Port62/66 */
+	/* EC Decode Range Port60/64, Port62/66 */
    /* Enable EC, PS/2 Keyboard/Mouse */
    pci_write_config16(PCH_LPC_DEV, LPC_EN,
    		   CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);
diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c
index 8752949..b6efbd7 100644
--- a/src/mainboard/lenovo/x201/romstage.c
+++ b/src/mainboard/lenovo/x201/romstage.c
@@ -45,7 +45,7 @@

static void pch_enable_lpc(void)
 {
-	/* X201 EC Decode Range Port60/64, Port62/66 */
+	/* EC Decode Range Port60/64, Port62/66 */
    /* Enable EC, PS/2 Keyboard/Mouse */
    pci_write_config16(PCH_LPC_DEV, LPC_EN,
    		   CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN |
diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c
index 6efcd01..efe6dde 100644
--- a/src/mainboard/lenovo/x220/romstage.c
+++ b/src/mainboard/lenovo/x220/romstage.c
@@ -36,7 +36,7 @@

void pch_enable_lpc(void)
 {
-	/* X230 EC Decode Range Port60/64, Port62/66 */
+	/* EC Decode Range Port60/64, Port62/66 */
    /* Enable EC, PS/2 Keyboard/Mouse */
    pci_write_config16(PCH_LPC_DEV, LPC_EN,
    		   CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);
diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c
index 94bcab3..d0ff67e 100644
--- a/src/mainboard/lenovo/x230/romstage.c
+++ b/src/mainboard/lenovo/x230/romstage.c
@@ -34,7 +34,7 @@

void pch_enable_lpc(void)
 {
-	/* X230 EC Decode Range Port60/64, Port62/66 */
+	/* EC Decode Range Port60/64, Port62/66 */
    /* Enable EC, PS/2 Keyboard/Mouse */
    pci_write_config16(PCH_LPC_DEV, LPC_EN,
    		   CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);