Change in coreboot[master]: sec/intel/txt/common.c: Only log ACM error on failure

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Angel Pons (Code Review)

16 Oct 2020 16 Oct '20

1:17 p.m.

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46492 )

Change subject: sec/intel/txt/common.c: Only log ACM error on failure ......................................................................

sec/intel/txt/common.c: Only log ACM error on failure

The TXT_BIOSACM_ERRORCODE register is only valid if bit 62 is set, or if CBnT is supported and bit 61 is set. Moreover, it is specific to LT-SX.

This allows TXT to work on client platforms, where these registers are regular scratchpads and are not necessarily written to by the BIOS ACM.

Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/security/intel/txt/common.c 1 file changed, 0 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46492/1

diff --git a/src/security/intel/txt/common.c b/src/security/intel/txt/common.c index 5f8a976..737ab0a 100644 --- a/src/security/intel/txt/common.c +++ b/src/security/intel/txt/common.c @@ -303,8 +303,6 @@ intel_txt_log_acm_error(read32((void *)TXT_BIOSACM_ERRORCODE)); return -1; } - if (intel_txt_log_acm_error(read32((void *)TXT_BIOSACM_ERRORCODE)) != 1) - return -1;

return 0; }

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Arthur Heymans (Code Review)

16 Oct 16 Oct

1:45 p.m.

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46492 )

Change subject: sec/intel/txt/common.c: Only log ACM error on failure ......................................................................

Patch Set 1: Code-Review+1

Patrick Rudolph (Code Review)

20 Oct 20 Oct

3:31 p.m.

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46492 )

Change subject: sec/intel/txt/common.c: Only log ACM error on failure ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46492/3//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/46492/3//COMMIT_MSG@9 PS3, Line 9: The TXT_BIOSACM_ERRORCODE register is only valid if bit 62 is set, or if the register only has 32bits, which bit are you refering to?

-- To view, visit https://review.coreboot.org/c/coreboot/+/46492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Gerrit-Change-Number: 46492 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Patrick Rudolph patrick.rudolph@9elements.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Tue, 20 Oct 2020 12:31:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

Angel Pons (Code Review)

4:05 p.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46492 )

Change subject: sec/intel/txt/common.c: Only log ACM error on failure ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46492/3//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/46492/3//COMMIT_MSG@9 PS3, Line 9: The TXT_BIOSACM_ERRORCODE register is only valid if bit 62 is set, or if

...

the register only has 32bits, which bit are you refering to?

I think I mixed some of these registers up at some point. Let me check...

-- To view, visit https://review.coreboot.org/c/coreboot/+/46492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Gerrit-Change-Number: 46492 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Patrick Rudolph patrick.rudolph@9elements.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Tue, 20 Oct 2020 13:05:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph patrick.rudolph@9elements.com Gerrit-MessageType: comment

Angel Pons (Code Review)

4:06 p.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46492 )

Change subject: sec/intel/txt/common.c: Only log ACM error on failure ......................................................................

Patch Set 3:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46492/3//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/46492/3//COMMIT_MSG@9 PS3, Line 9: The TXT_BIOSACM_ERRORCODE register is only valid if bit 62 is set, or if

...

I think I mixed some of these registers up at some point. Let me check...

Ah, I just forgot to specify the bits are in the TXT_SPAD register.

-- To view, visit https://review.coreboot.org/c/coreboot/+/46492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Gerrit-Change-Number: 46492 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Patrick Rudolph patrick.rudolph@9elements.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Tue, 20 Oct 2020 13:06:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph patrick.rudolph@9elements.com Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Angel Pons (Code Review)

4:31 p.m.

Hello build bot (Jenkins), Arthur Heymans,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/46492

to look at the new patch set (#4).

Change subject: sec/intel/txt/common.c: Only log ACM error on failure ......................................................................

sec/intel/txt/common.c: Only log ACM error on failure

The TXT_BIOSACM_ERRORCODE register is only valid if TXT_SPAD bit 62 is set, or if CBnT is supported and bit 61 is set. Moreover, this is only applicable to LT-SX (i.e. platforms supporting Intel TXT for Servers).

This allows TXT to work on client platforms, where these registers are regular scratchpads and are not necessarily written to by the BIOS ACM.

Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/security/intel/txt/common.c 1 file changed, 0 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/46492/4

-- To view, visit https://review.coreboot.org/c/coreboot/+/46492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Gerrit-Change-Number: 46492 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Patrick Rudolph patrick.rudolph@9elements.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: newpatchset

Angel Pons (Code Review)

21 Oct 21 Oct

12:50 a.m.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46492 )

Change subject: sec/intel/txt/common.c: Only log ACM error on failure ......................................................................

Patch Set 4:

(1 comment)

https://review.coreboot.org/c/coreboot/+/46492/3//COMMIT_MSG Commit Message:

https://review.coreboot.org/c/coreboot/+/46492/3//COMMIT_MSG@9 PS3, Line 9: The TXT_BIOSACM_ERRORCODE register is only valid if bit 62 is set, or if

...

Ah, I just forgot to specify the bits are in the TXT_SPAD register.

Done

-- To view, visit https://review.coreboot.org/c/coreboot/+/46492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Gerrit-Change-Number: 46492 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Patrick Rudolph patrick.rudolph@9elements.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Tue, 20 Oct 2020 21:50:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph patrick.rudolph@9elements.com Comment-In-Reply-To: Angel Pons th3fanbus@gmail.com Gerrit-MessageType: comment

Arthur Heymans (Code Review)

3:40 p.m.

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46492 )

Change subject: sec/intel/txt/common.c: Only log ACM error on failure ......................................................................

Patch Set 4: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/46492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Gerrit-Change-Number: 46492 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Patrick Rudolph patrick.rudolph@9elements.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-Comment-Date: Wed, 21 Oct 2020 12:40:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Angel Pons (Code Review)

22 Oct 22 Oct

11 p.m.

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46492 )

Change subject: sec/intel/txt/common.c: Only log ACM error on failure ......................................................................

sec/intel/txt/common.c: Only log ACM error on failure

This allows TXT to work on client platforms, where these registers are regular scratchpads and are not necessarily written to by the BIOS ACM.

Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46492 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/security/intel/txt/common.c 1 file changed, 0 insertions(+), 2 deletions(-)

Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved

return 0; }

-- To view, visit https://review.coreboot.org/c/coreboot/+/46492 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If047ad79f12de5e0f34227198ee742b9e2b5eb54 Gerrit-Change-Number: 46492 Gerrit-PatchSet: 6 Gerrit-Owner: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Angel Pons th3fanbus@gmail.com Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Patrick Rudolph patrick.rudolph@9elements.com Gerrit-CC: Paul Menzel paulepanter@users.sourceforge.net Gerrit-MessageType: merged

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Angel Pons (Code Review)
Arthur Heymans (Code Review)
Patrick Rudolph (Code Review)