[M] Change in coreboot[master]: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal para...

[Tim Van Patten (Code Review)]

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, EricKY Cheng, Matt DeVillier, Martin Roth, Fred Reitberger, Felix Held.

Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68649 )

Change subject: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal parameters
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Patch Set 31:

(1 comment)

File src/soc/amd/mendocino/root_complex.c:

https://review.coreboot.org/c/coreboot/+/68649/comment/42844cdf_20908111 
PS16, Line 393: #else
> Hi AMD, […]

My concern is that the new fields added to `DPTC_INPUTS()` need to be added to `google/skyrim/variants/skyrim/overridetree.cb`, so we write good values.

It looks like `slow_ppt_time_constant_s` already exists, so you just need to add _sttMinLimit, _sttM1, _sttM2, _sttCApu, _sttSkinTempLimitApu.