[S] Change in coreboot[master]: soc/intel/apollolake/acpi: Remove STOM from ACPI

[Sean Rhodes (Code Review)]

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/66267 )

(

17 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/intel/apollolake/acpi: Remove STOM from ACPI
......................................................................

soc/intel/apollolake/acpi: Remove STOM from ACPI

This should only contain resources that the PCI domain uses. Stolen
memory prevents the PCI domain from allocating anything where it is.

Signed-off-by: Sean Rhodes 
Change-Id: I1562396f0b747a81bbc584314956809bd3865ff9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66267
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/apollolake/acpi/northbridge.asl
1 file changed, 16 insertions(+), 22 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl
index deda3b9..1b47509 100644
--- a/src/soc/intel/apollolake/acpi/northbridge.asl
+++ b/src/soc/intel/apollolake/acpi/northbridge.asl
@@ -17,9 +17,6 @@
    	    ,	25,
    	PXBR,	11,	/* PCI Express Base Address */

-		Offset(0xB4),
-		BGSM,   32,	/* Base of Graphics Stolen Memory */
-
    	Offset (0xbc),	/* TOLUD (0:0:0:bc) */
    	    ,	20,
    	TLUD,   12,	/* Top of Lower Usable DRAM */
@@ -59,12 +56,6 @@
    			0x00000000, 0x000a0000, 0x000bffff, 0x00000000,
    			0x00020000,,,)

-		/* Data and GFX stolen memory */
-		DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed,
-				Cacheable, ReadWrite,
-				0x00000000, 0x3be00000, 0x3fffffff, 0x00000000,
-				0x04200000,,, STOM)
-
    	/*
    	 * PCI MMIO Region (TOLUD - PCI extended base MMCONF)
    	 * This assumes that MMCONF is placed after PCI config space,
@@ -99,19 +90,6 @@
    /* Calculate PCI MMIO Length */
    PLEN = PMAX - PMIN + 1

-	/* Find GFX resource area in GCRS */
-	CreateDwordField(MCRS, STOM._MIN, GMIN)
-	CreateDwordField(MCRS, STOM._MAX, GMAX)
-	CreateDwordField(MCRS, STOM._LEN, GLEN)
-
-	/* Read BGSM */
-	GMIN = _SB.PCI0.MCHC.BGSM & 0xFFF00000
-
-	/* Read TOLUD */
-	GMAX = ^MCHC.TLUD << 20
-	GMAX--
-	GLEN = GMAX - GMIN + 1
-
    /* Patch PM02 range based on Memory Size */
    If (A4GS == 0) {
    	CreateQwordField (MCRS, PM02._LEN, MSEN)