Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75588?usp=email )
Change subject: mb/google/myst/bootblock.c: Initialize spi flash ......................................................................
mb/google/myst/bootblock.c: Initialize spi flash
Initialize the SPI Flash in bootblock to ensure that CONFIG_SPI_FLASH_EXIT_4_BYTE_ADDR_MODE will exit 4-byte addressing mode.
BUG=b:285110121 TEST=boot myst and verify flash operations work correctly
Change-Id: Ia88d2b46884b096b4c558bc86513159ec6d35eb5 Signed-off-by: Fred Reitberger reitbergerfred@gmail.com --- M src/mainboard/google/myst/bootblock.c 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/75588/1
diff --git a/src/mainboard/google/myst/bootblock.c b/src/mainboard/google/myst/bootblock.c index 4404666..c12aeaa 100644 --- a/src/mainboard/google/myst/bootblock.c +++ b/src/mainboard/google/myst/bootblock.c @@ -3,7 +3,9 @@ #include <amdblocks/espi.h> #include <bootblock_common.h> #include <baseboard/variants.h> +#include <console/console.h> #include <soc/espi.h> +#include <spi_flash.h>
void mb_set_up_early_espi(void) { @@ -35,4 +37,8 @@
variant_bootblock_gpio_table(&gpios, &num_gpios); gpio_configure_pads(gpios, num_gpios); + + // b:285110121 - temp workaround is to add a dummy flash call + const struct spi_flash *spi = boot_device_spi_flash(); + printk(BIOS_DEBUG, "Initialized spi flash %p\n", spi); }