Name of user not set #1003506 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52630 )
Change subject: mainboard: Add Synology DS918+ ......................................................................
mainboard: Add Synology DS918+
Reformated gpio part and dsdt.
Here are serial logs: https://clbin.com/tHOE7 -- Master branch https://clbin.com/wp4R8 -- 4.13 + seabios, same code except 1 include in dsdt https://clbin.com/iUrgJ -- 4.13 + tianocore, same code...
Video test: https://schizoden.xyz/videos/watch/816c5a68-af6f-4dd4-8c7e-43d068410822
Change-Id: Ia7828d5a9fe93f80604b20fcff7d90bb56ba40bc Signed-off-by: mkjOoB dump@schizoden.xyz --- M src/mainboard/synology/ds918plus/Makefile.inc M src/mainboard/synology/ds918plus/bootblock.c M src/mainboard/synology/ds918plus/devicetree.cb M src/mainboard/synology/ds918plus/ds918plus.fmd M src/mainboard/synology/ds918plus/dsdt.asl D src/mainboard/synology/ds918plus/gpio.c M src/mainboard/synology/ds918plus/gpio.h A src/mainboard/synology/ds918plus/gpio_early.h M src/mainboard/synology/ds918plus/mainboard.c 9 files changed, 363 insertions(+), 393 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/52630/1
diff --git a/src/mainboard/synology/ds918plus/Makefile.inc b/src/mainboard/synology/ds918plus/Makefile.inc index 3e9bf68..9e3e892 100644 --- a/src/mainboard/synology/ds918plus/Makefile.inc +++ b/src/mainboard/synology/ds918plus/Makefile.inc @@ -1,5 +1,3 @@ bootblock-y += bootblock.c -bootblock-y += gpio.c
ramstage-y += mainboard.c -ramstage-y += gpio.c diff --git a/src/mainboard/synology/ds918plus/bootblock.c b/src/mainboard/synology/ds918plus/bootblock.c index 61f3c92..cd98e14 100644 --- a/src/mainboard/synology/ds918plus/bootblock.c +++ b/src/mainboard/synology/ds918plus/bootblock.c @@ -1,17 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootblock_common.h> -#include <intelblocks/lpc_lib.h> -#include "gpio.h" +#include <soc/gpio.h> + +#include "gpio_early.h"
void bootblock_mainboard_init(void) { - const struct pad_config *pads; - size_t num; - - lpc_configure_pads(); - /* Configure GPIOs needed prior to ramstage. */ - pads = early_gpio_table(&num); - gpio_configure_pads(pads, num); + gpio_configure_pads(early_gpio_table, ARRAY_SIZE(early_gpio_table)); } diff --git a/src/mainboard/synology/ds918plus/devicetree.cb b/src/mainboard/synology/ds918plus/devicetree.cb index fcf1883..8beb5be 100644 --- a/src/mainboard/synology/ds918plus/devicetree.cb +++ b/src/mainboard/synology/ds918plus/devicetree.cb @@ -8,8 +8,8 @@ device pci 00.0 on end # - Host Bridge device pci 00.1 off end # - DPTF Static device PCI: 00:00.1 not found, disabling it. device pci 00.2 off end # - NPK - device pci 02.0 on end # - Gen - device pci 03.0 off end # - Iunit + device pci 02.0 off end # - Gen + device pci 03.0 on end # - Iunit device pci 0d.0 on end # - P2SB device pci 0d.1 on end # - PMC device pci 0d.2 on end # - SPI diff --git a/src/mainboard/synology/ds918plus/ds918plus.fmd b/src/mainboard/synology/ds918plus/ds918plus.fmd index 21d780a..891138e 100644 --- a/src/mainboard/synology/ds918plus/ds918plus.fmd +++ b/src/mainboard/synology/ds918plus/ds918plus.fmd @@ -1,21 +1,21 @@ FLASH 16M { - SI_DESC 0x1000 - SI_BIOS 0xefe000 { - IFWI 0x2ff000 - OBB 0xbff000 { - FMAP 0x1000 - UNIFIED_MRC_CACHE 0x21000 { - RECOVERY_MRC_CACHE 0x10000 - RW_MRC_CACHE 0x10000 - RW_VAR_MRC_CACHE 0x1000 + SI_DESC@0x0 0x1000 + SI_BIOS@0x1000 0xefe000 { + IFWI@0x0 0x2ff000 + OBB@0x2ff000 0xbff000 { + FMAP@0x0 0x1000 + UNIFIED_MRC_CACHE@0x1000 0x21000 { + RECOVERY_MRC_CACHE@0x0 0x10000 + RW_MRC_CACHE@0x10000 0x10000 + RW_VAR_MRC_CACHE@0x20000 0x1000 } - CONSOLE 0x20000 - COREBOOT(CBFS) - BIOS_UNUSABLE 0x40000 + CONSOLE@0x22000 0x20000 + COREBOOT(CBFS)@0x42000 0xb7d000 + BIOS_UNUSABLE@0xbbf000 0x40000 } } - SI_DEVICEEXT 0x101000 { - DEVICE_EXTENSION 0x100000 - UNUSED_HOLE 0x1000 + SI_DEVICEEXT@0xeff000 0x101000 { + DEVICE_EXTENSION@0x0 0x100000 + UNUSED_HOLE@0x100000 0x1000 } } diff --git a/src/mainboard/synology/ds918plus/dsdt.asl b/src/mainboard/synology/ds918plus/dsdt.asl index 04c5b5e..bf88029 100644 --- a/src/mainboard/synology/ds918plus/dsdt.asl +++ b/src/mainboard/synology/ds918plus/dsdt.asl @@ -10,21 +10,16 @@ 0x20110725 /* OEM revision */ ) { - - /* global NVS and variables */ + #include <acpi/dsdt_top.asl> #include <soc/intel/apollolake/acpi/globalnvs.asl> - - /* CPU */ #include <cpu/intel/common/acpi/cpu.asl> + #include <southbridge/intel/common/acpi/sleepstates.asl>
Scope (_SB) { Device (PCI0) { #include <soc/intel/apollolake/acpi/northbridge.asl> #include <soc/intel/apollolake/acpi/southbridge.asl> - #include <soc/intel/apollolake/acpi/pch_hda.asl> } } - - #include <southbridge/intel/common/acpi/sleepstates.asl> } diff --git a/src/mainboard/synology/ds918plus/gpio.c b/src/mainboard/synology/ds918plus/gpio.c deleted file mode 100644 index 9f726dea..0000000 --- a/src/mainboard/synology/ds918plus/gpio.c +++ /dev/null @@ -1,350 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include "gpio.h" - -/* - * GPIO Pad configuration in ramstage. - */ -static const struct pad_config gpio_table_config[] = { - - /* ----- GPIO Community North ----- */ - - /* ------- GPIO Group North ------- */ - PAD_CFG_NF_IOSSTATE(GPIO_0, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ - PAD_CFG_NF_IOSSTATE(GPIO_1, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ - PAD_CFG_NF_IOSSTATE(GPIO_2, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ - PAD_CFG_NF_IOSSTATE(GPIO_3, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ - PAD_CFG_NF_IOSSTATE(GPIO_4, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ - PAD_CFG_NF_IOSSTATE(GPIO_5, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ - PAD_CFG_NF_IOSSTATE(GPIO_6, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ - PAD_CFG_NF_IOSSTATE(GPIO_7, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ - PAD_CFG_NF_IOSSTATE(GPIO_8, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ - PAD_CFG_GPO(GPIO_9, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_10, 1, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_11, 1, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_12, 1, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_13, 1, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_14, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_15, 1, DEEP), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_16, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_17, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_18, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPO(GPIO_19, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_20, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_21, 1, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_22, 1, DEEP), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_23, NONE, DEEP, OFF, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_24, NONE, DEEP, OFF, ACPI), /* GPIO */ - PAD_CFG_GPO(GPIO_25, 1, DEEP), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_26, NONE, DEEP, OFF, ACPI), /* GPIO */ - PAD_CFG_GPO(GPIO_27, 1, DEEP), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_28, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_29, NONE, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_30, NONE, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_31, NONE, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_32, NONE, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPI_APIC_IOS(GPIO_33, DN_20K, DEEP, EDGE_SINGLE, NONE, IGNORE, SAME), /* GPIO */ - PAD_CFG_NF(GPIO_34, DN_20K, DEEP, NF1), /* PWM0 */ - PAD_CFG_TERM_GPO(GPIO_35, 1, DN_20K, DEEP), /* GPIO */ - PAD_CFG_NF(GPIO_36, DN_20K, DEEP, NF1), /* PWM2 */ - PAD_CFG_NF(GPIO_37, DN_20K, DEEP, NF1), /* PWM3 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART0_TXD */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_40, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART0_RTS_N */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_41, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_CTS_N */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART1_RXD */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, UP_20K, DEEP, NF1, HIZCRx0, DISPUPD), /* LPSS_UART1_TXD */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_44, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART1_RTS_N */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_45, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* LPSS_UART1_CTS_N */ - PAD_CFG_NF(GPIO_46, UP_20K, DEEP, NF1), /* LPSS_UART2_RXD */ - PAD_CFG_NF(GPIO_47, UP_20K, DEEP, NF1), /* LPSS_UART2_TXD */ - PAD_CFG_GPI_TRIG_OWN(GPIO_48, UP_20K, DEEP, OFF, ACPI), /* GPIO */ - PAD_CFG_NF(GPIO_49, UP_20K, DEEP, NF1), /* LPSS_UART2_CTS_N */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_62, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_63, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_64, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_65, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_66, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_67, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_68, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_69, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_70, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_71, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_72, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_73, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ - PAD_CFG_NF_IOSTANDBY_IGNORE(TCK, DN_20K, DEEP, NF1), /* JTAG_TCK */ - PAD_CFG_NF_IOSTANDBY_IGNORE(TRST_B, DN_20K, DEEP, NF1), /* JTAG_TRST_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(TMS, UP_20K, DEEP, NF1), /* JTAG_TMS */ - PAD_CFG_NF_IOSTANDBY_IGNORE(TDI, UP_20K, DEEP, NF1), /* JTAG_TDI */ - PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PMODE, NONE, DEEP, NF1), /* JTAG_PMODE */ - PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PREQ_B, UP_20K, DEEP, NF1), /* JTAG_PREQ_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(JTAGX, UP_20K, DEEP, NF1), /* JTAGX */ - PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PRDY_B, UP_20K, DEEP, NF1), /* JTAG_PRDY_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(TDO, UP_20K, DEEP, NF1), /* JTAG_TDO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(CNV_BRI_DT, DN_20K, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(CNV_BRI_RSP, DN_20K, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_TERM_GPO(CNV_RGI_DT, 1, UP_1K, DEEP), /* GPIO */ - /* CNV_RGI_RSP - RESERVED */ - PAD_CFG_NF_IOSTANDBY_IGNORE(SVID0_ALERT_B, NONE, DEEP, NF1), /* SVID0_ALERT_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(SVID0_DATA, UP_20K, DEEP, NF1), /* SVID0_DATA */ - PAD_CFG_NF_IOSTANDBY_IGNORE(SVID0_CLK, UP_20K, DEEP, NF1), /* SVID0_CLK */ - - /* --- GPIO Community NorthWest --- */ - - /* ----- GPIO Group NorthWest ----- */ - PAD_CFG_NF_IOSSTATE(GPIO_187, UP_20K, DEEP, NF1, HIZCRx0), /* DDI0_DDC_SDA */ - PAD_CFG_NF_IOSSTATE(GPIO_188, UP_20K, DEEP, NF1, HIZCRx0), /* DDI0_DDC_SCL */ - PAD_CFG_NF(GPIO_189, UP_2K, DEEP, NF1), /* DDI1_DDC_SDA */ - PAD_CFG_NF(GPIO_190, UP_2K, DEEP, NF1), /* DDI1_DDC_SCL */ - PAD_CFG_NF(GPIO_191, DN_20K, DEEP, NF1), /* MIPI_I2C_SDA */ - PAD_CFG_NF(GPIO_192, DN_20K, DEEP, NF1), /* MIPI_I2C_SCL */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_193, 1, DEEP, DN_20K, Tx0RxDCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_194, 1, DEEP, DN_20K, Tx0RxDCRx0, SAME), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_195, 1, DEEP, DN_20K, Tx0RxDCRx0, SAME), /* GPIO */ - PAD_CFG_TERM_GPO(GPIO_196, 1, DN_20K, DEEP), /* GPIO */ - PAD_CFG_TERM_GPO(GPIO_197, 1, DN_20K, DEEP), /* GPIO */ - PAD_CFG_TERM_GPO(GPIO_198, 1, DN_20K, DEEP), /* GPIO */ - PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF2), /* DDI1_HPD */ - PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2), /* DDI0_HPD */ - PAD_CFG_NF_IOSSTATE(GPIO_201, DN_20K, DEEP, NF1, Tx0RxDCRx0), /* MDSI_A_TE */ - PAD_CFG_NF_IOSSTATE(GPIO_202, DN_20K, DEEP, NF1, Tx0RxDCRx0), /* MDSI_C_TE */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_203, UP_20K, DEEP, NF1), /* USB_OC0_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_204, UP_20K, DEEP, NF1), /* USB_OC1_N */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_FS0, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_FS1, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(PMC_SPI_FS2, 1, DEEP, NONE, IGNORE, SAME), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_RXD, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_TXD, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_CLK, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_TERM_GPO(PMIC_PWRGOOD, 1, UP_1K, DEEP), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMIC_RESET_B, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_213, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_214, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_215, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_NF(PMIC_THERMTRIP_B, UP_20K, DEEP, NF1), /* THERMTRIP_N */ - PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMIC_STDBY, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ - PAD_CFG_NF_IOSSTATE(PROCHOT_B, UP_20K, DEEP, NF1, HIZCRx1), /* PROCHOT_N */ - /* PMIC_I2C_SCL - RESERVED */ - /* PMIC_I2C_SDA - RESERVED */ - PAD_CFG_NF(GPIO_74, DN_20K, DEEP, NF1), /* AVS_I2S1_MCLK */ - PAD_CFG_NF(GPIO_75, DN_20K, DEEP, NF1), /* AVS_I2S1_BCLK */ - PAD_CFG_TERM_GPO(GPIO_76, 1, DN_20K, DEEP), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_77, DN_20K, DEEP, OFF, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_78, DN_20K, DEEP, OFF, ACPI), /* GPIO */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_79, DN_20K, DEEP, NF2), /* AVS_I2S4_BCLK */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_80, DN_20K, DEEP, NF2), /* AVS_I2S4_WS_SYNC */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_81, DN_20K, DEEP, NF2, TxDRxE, ENPD), /* AVS_I2C4_SDI */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_82, DN_20K, DEEP, NF2), /* AVS_I2S4_SDO */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_83, DN_20K, DEEP, NF1, TxDRxE, ENPD), /* AVS_DMIC_DATA_2 */ - PAD_CFG_NF(GPIO_84, DN_20K, DEEP, NF2), /* AVS_HDA_RST_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_85, DN_20K, DEEP, NF1), /* AVS_I2S2_BCLK */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_86, DN_20K, DEEP, NF1), /* AVS_I2S2_WS_SYNC */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_87, DN_20K, DEEP, NF1), /* AVS_I2S2_SDI */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_88, DN_20K, DEEP, NF1), /* AVS_I2S2_SDO */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_89, DN_20K, DEEP, NF1), /* AVS_I2S3_BCLK */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_90, DN_20K, DEEP, NF1), /* AVS_I2S3_WS_SYNC */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_91, DN_20K, DEEP, NF1, TxDRxE, ENPD), /* AVS_I2S3_SDI */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_92, DN_20K, DEEP, NF1), /* AVS_I2S3_SDO */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_97, NATIVE, DEEP, NF1), /* FST_SPI_CS0_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_98, NATIVE, DEEP, NF1), /* FST_SPI_CS1_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_99, NATIVE, DEEP, NF1), /* FST_SPI_MOSI_IO0 */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_100, NATIVE, DEEP, NF1), /* FST_SPI_MISO_IO1 */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_101, NATIVE, DEEP, NF1), /* FST_SPI_IO2 */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_102, NATIVE, DEEP, NF1), /* FST_SPI_IO3 */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_103, NATIVE, DEEP, NF1), /* FST_SPI_CLK */ - PAD_CFG_NF_IOSTANDBY_IGNORE(FST_SPI_CLK_FB, NONE, DEEP, NF1), /* n/a */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_104, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_CLK */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_105, UP_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_FS0 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, UP_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_FS1 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_109, UP_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_RXD */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_110, UP_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_TXD */ - PAD_CFG_GPI_TRIG_OWN(GPIO_111, DN_20K, DEEP, OFF, ACPI), /* GPIO */ - PAD_CFG_NF(GPIO_112, DN_20K, DEEP, NF2), /* n/a */ - PAD_CFG_GPI_TRIG_OWN(GPIO_113, DN_20K, DEEP, OFF, ACPI), /* GPIO */ - PAD_CFG_NF(GPIO_116, DN_20K, DEEP, NF2), /* n/a */ - PAD_CFG_NF(GPIO_117, DN_20K, DEEP, NF2), /* n/a */ - PAD_CFG_NF(GPIO_118, DN_20K, DEEP, NF1), /* SIO_SPI_2_CLK */ - PAD_CFG_NF(GPIO_119, DN_20K, DEEP, NF1), /* SIO_SPI_2_FS0 */ - PAD_CFG_NF(GPIO_120, DN_20K, DEEP, NF1), /* SIO_SPI_2_FS1 */ - PAD_CFG_NF(GPIO_121, DN_20K, DEEP, NF1), /* SIO_SPI_2_FS2 */ - PAD_CFG_NF(GPIO_122, DN_20K, DEEP, NF1), /* SIO_SPI_2_RXD */ - PAD_CFG_NF(GPIO_123, DN_20K, DEEP, NF1), /* SIO_SPI_2_TXD */ - - /* ------ GPIO Community West ----- */ - - /* -------- GPIO Group West ------- */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_124, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C0_SDA */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_125, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C0_SCL */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C1_SDA */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C1_SCL */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_128, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C2_SDA */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_129, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C2_SCL */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_130, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C3_SDA */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_131, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C3_SCL */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C4_SDA */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C4_SCL */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_134, NONE, DEEP, NF2, IGNORE, ENPU), /* ISH_I2C0_SDA */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_135, NONE, DEEP, NF2, IGNORE, ENPU), /* ISH_I2C0_SCL */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_136, NONE, DEEP, NF2, IGNORE, ENPU), /* ISH_I2C1_SDA */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_137, NONE, DEEP, NF2, IGNORE, ENPU), /* ISH_I2C1_SCL */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_138, UP_1K, DEEP, NF1, Tx0RxDCRx0, ENPU), /* LPSS_I2C7_SDA */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_139, UP_1K, DEEP, NF1, Tx0RxDCRx0, ENPU), /* LPSS_I2C7_SCL */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_146, DN_20K, DEEP, NF3), /* AVS_HDA_BCLK */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_147, DN_20K, DEEP, NF3), /* AVS_HDA_WS_SYNC */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_148, DN_20K, DEEP, NF3), /* AVS_HDA_SDI */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_149, 1, DEEP, DN_20K, IGNORE, SAME), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_150, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_151, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_NF(GPIO_152, DN_20K, DEEP, NF2), /* AVS_I2S5_SDI */ - PAD_CFG_GPI_TRIG_OWN(GPIO_153, NONE, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPIO_154, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ - PAD_CFG_GPO(GPIO_155, 1, DEEP), /* GPIO */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_209, NONE, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ0_N */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_210, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ1_N */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_211, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ2_N */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_212, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ3_N */ - PAD_CFG_NF(OSC_CLK_OUT_0, DN_20K, DEEP, NF1), /* OSC_CLK_OUT_0 */ - PAD_CFG_NF(OSC_CLK_OUT_1, DN_20K, DEEP, NF1), /* OSC_CLK_OUT_1 */ - PAD_CFG_NF(OSC_CLK_OUT_2, DN_20K, DEEP, NF1), /* OSC_CLK_OUT_2 */ - PAD_CFG_NF(OSC_CLK_OUT_3, DN_20K, DEEP, NF1), /* OSC_CLK_OUT_3 */ - PAD_CFG_GPI_TRIG_OWN(OSC_CLK_OUT_4, DN_20K, DEEP, OFF, ACPI), /* GPIO */ - PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_AC_PRESENT, DN_20K, DEEP, NF1), /* PMU_AC_PRESENT */ - PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_BATLOW_B, UP_20K, DEEP, NF1), /* PMU_BATLOW_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PLTRST_B, NONE, DEEP, NF1), /* PMU_PLTRST_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PWRBTN_B, UP_20K, DEEP, NF1), /* PMU_PWRBTN_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_RESETBUTTON_B, NONE, DEEP, NF1), /* PMU_RSTBTN_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S0_B, NONE, DEEP, NF1), /* PMU_SLP_S0_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S3_B, NONE, DEEP, NF1), /* PMU_SLP_S3_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S4_B, NONE, DEEP, NF1), /* PMU_SLP_S4_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SUSCLK, NONE, DEEP, NF1), /* PMU_SUSCLK */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(PMU_WAKE_B, 1, DEEP, UP_20K, IGNORE, SAME), /* GPIO */ - PAD_CFG_NF_IOSTANDBY_IGNORE(SUS_STAT_B, NONE, DEEP, NF1), /* SUS_STAT_B */ - PAD_CFG_NF_IOSTANDBY_IGNORE(SUSPWRDNACK, NONE, DEEP, NF1), /* SUSPWRDNACK */ - - /* --- GPIO Community SouthWest --- */ - - /* ----- GPIO Group SouthWest ----- */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_205, UP_20K, DEEP, NF1), /* PCIE_WAKE0_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_206, UP_20K, DEEP, NF1), /* PCIE_WAKE1_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_207, UP_20K, DEEP, NF1), /* PCIE_WAKE2_N */ - PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_208, UP_20K, DEEP, NF1), /* PCIE_WAKE3_N */ - PAD_CFG_NF_IOSSTATE(GPIO_156, DN_20K, DEEP, NF1, Tx0RxDCRx0), /* EMMC_CLK */ - PAD_CFG_NF_IOSSTATE(GPIO_157, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D0 */ - PAD_CFG_NF_IOSSTATE(GPIO_158, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D1 */ - PAD_CFG_NF_IOSSTATE(GPIO_159, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D2 */ - PAD_CFG_NF_IOSSTATE(GPIO_160, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D3 */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_161, 1, DEEP, UP_20K, HIZCRx1, SAME), /* GPIO */ - PAD_CFG_NF_IOSSTATE(GPIO_162, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D5 */ - PAD_CFG_NF_IOSSTATE(GPIO_163, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D6 */ - PAD_CFG_NF_IOSSTATE(GPIO_164, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D7 */ - PAD_CFG_NF_IOSSTATE(GPIO_165, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_CMD */ - PAD_CFG_NF_IOSSTATE(GPIO_166, DN_20K, DEEP, NF1, Tx0RxDCRx0), /* GPIO_166 */ - PAD_CFG_NF_IOSSTATE(GPIO_167, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_167 */ - PAD_CFG_NF_IOSSTATE(GPIO_168, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_168 */ - PAD_CFG_NF_IOSSTATE(GPIO_169, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_169 */ - PAD_CFG_NF_IOSSTATE(GPIO_170, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_170 */ - PAD_CFG_NF_IOSSTATE(GPIO_171, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_171 */ - PAD_CFG_GPO(GPIO_172, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_179, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_173, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_174, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_175, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_176, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_177, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_178, 0, DEEP), /* GPIO */ - PAD_CFG_GPO(GPIO_186, 0, DEEP), /* GPIO */ - PAD_CFG_NF_IOSSTATE(GPIO_182, DN_20K, DEEP, NF1, HIZCRx0), /* EMMC_RCLK */ - PAD_CFG_TERM_GPO(GPIO_183, 0, DN_20K, DEEP), /* GPIO */ - PAD_CFG_TERM_GPO(SMB_ALERTB, 0, UP_20K, DEEP), /* GPIO */ - PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_CLK, UP_20K, DEEP, NF1), /* SMB_CLK */ - PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_DATA, UP_20K, DEEP, NF1), /* SMB_DATA */ - PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), /* LPC_ILB_SERIRQ */ - PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_CLKOUT0, NONE, DEEP, NF1), /* LPC_CLKOUT0 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_CLKOUT1 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_AD0 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_AD1 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_AD2 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_AD3 */ - PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_CLKRUNB, UP_20K, DEEP, NF1), /* LPC_CLKRUNB */ - PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_FRAMEB */ -}; - -const struct pad_config *gpio_table(size_t *num) -{ - *num = ARRAY_SIZE(gpio_table_config); - return gpio_table_config; -} - -/* GPIOs needed prior to ramstage. */ -static const struct pad_config early_gpio_table_config[] = { - - /* ------- GPIO Group North ------- */ - - PAD_CFG_NF(GPIO_46, UP_20K, DEEP, NF1), /* LPSS_UART2_RXD */ - PAD_CFG_NF(GPIO_47, UP_20K, DEEP, NF1), /* LPSS_UART2_TXD */ - - PAD_CFG_NF(GPIO_134, UP_20K, DEEP, NF2), /* ISH_I2C0_SDA */ - PAD_CFG_NF(GPIO_135, UP_20K, DEEP, NF2), /* ISH_I2C0_SCL */ - PAD_CFG_NF(GPIO_136, UP_20K, DEEP, NF2), /* ISH_I2C1_SDA */ - PAD_CFG_NF(GPIO_137, UP_20K, DEEP, NF2), /* ISH_I2C1_SCL */ - - PAD_CFG_NF(GPIO_0, DN_20K, DEEP, NF1), /* n/a */ - PAD_CFG_NF(GPIO_1, DN_20K, DEEP, NF1), /* n/a */ - PAD_CFG_NF(GPIO_2, DN_20K, DEEP, NF1), /* n/a */ - PAD_CFG_NF(GPIO_3, DN_20K, DEEP, NF1), /* n/a */ - PAD_CFG_NF(GPIO_4, DN_20K, DEEP, NF1), /* n/a */ - PAD_CFG_NF(GPIO_5, DN_20K, DEEP, NF1), /* n/a */ - PAD_CFG_NF(GPIO_6, DN_20K, DEEP, NF1), /* n/a */ - PAD_CFG_NF(GPIO_7, DN_20K, DEEP, NF1), /* n/a */ - PAD_CFG_NF(GPIO_8, DN_20K, DEEP, NF1), /* n/a */ - - /* EXP_I2C_SDA and I2C_PSS_SDA and I2C_2_SDA_IOEXP */ - PAD_CFG_NF(GPIO_7, UP_1K, DEEP, NF1), - /* EXP_I2C_SCL and I2C_PSS_SCL and I2C_2_SCL_IOEXP */ - PAD_CFG_NF(GPIO_8, UP_1K, DEEP, NF1), - - PAD_CFG_GPO(GPIO_13, 0, DEEP), /* PERST# */ - PAD_CFG_GPO(GPIO_15, 0, DEEP), /* PERST# */ - PAD_CFG_GPO(GPIO_17, 1, DEEP), /* PFET */ - PAD_CFG_GPO(GPIO_19, 1, DEEP), /* PFET */ - PAD_CFG_GPO(GPIO_152, 0, DEEP), /* PERST# */ - - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_210, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ1_N */ - - /* ------- GPIO Group South-West ------- */ - - PAD_CFG_NF(SMB_CLK, UP_20K, DEEP, NF1), /* SMB_CLK */ - PAD_CFG_NF(SMB_DATA, UP_20K, DEEP, NF1), /* SMB_DATA */ - PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), /* LPC_ILB_SERIRQ */ - PAD_CFG_NF(LPC_CLKOUT0, NONE, DEEP, NF1), /* LPC_CLKOUT0 */ - PAD_CFG_NF(LPC_CLKOUT1, NONE, DEEP, NF1), /* LPC_CLKOUT1 */ - PAD_CFG_NF(LPC_AD0, UP_20K, DEEP, NF1), /* LPC_AD0 */ - PAD_CFG_NF(LPC_AD1, UP_20K, DEEP, NF1), /* LPC_AD1 */ - PAD_CFG_NF(LPC_AD2, UP_20K, DEEP, NF1), /* LPC_AD2 */ - PAD_CFG_NF(LPC_AD3, UP_20K, DEEP, NF1), /* LPC_AD3 */ - PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1), /* LPC_CLKRUNB */ - PAD_CFG_NF(LPC_FRAMEB, UP_20K, DEEP, NF1), /* LPC_FRAMEB */ - - /* ------- GPIO Group North ------- */ - - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART0_TXD */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART1_RXD */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, UP_20K, DEEP, NF1, HIZCRx0, DISPUPD), /* LPSS_UART1_TXD */ -}; - -const struct pad_config *early_gpio_table(size_t *num) -{ - *num = ARRAY_SIZE(early_gpio_table_config); - return early_gpio_table_config; -} - -/* GPIO settings before entering sleep. */ -static const struct pad_config sleep_gpio_table_config[] = { -}; - -const struct pad_config *sleep_gpio_table(size_t *num) -{ - *num = ARRAY_SIZE(sleep_gpio_table_config); - return sleep_gpio_table_config; -} diff --git a/src/mainboard/synology/ds918plus/gpio.h b/src/mainboard/synology/ds918plus/gpio.h index f389d06..39a6a76 100644 --- a/src/mainboard/synology/ds918plus/gpio.h +++ b/src/mainboard/synology/ds918plus/gpio.h @@ -2,6 +2,274 @@
#include <soc/gpio.h>
-const struct pad_config *gpio_table(size_t *num); -const struct pad_config *early_gpio_table(size_t *num); -const struct pad_config *sleep_gpio_table(size_t *num); +#ifndef CFG_GPIO_H +#define CFG_GPIO_H + +/* + * GPIO Pad configuration in ramstage. + */ +static const struct pad_config gpio_table[] = { + + /* ----- GPIO Community North ----- */ + + /* ------- GPIO Group North ------- */ + PAD_CFG_NF_IOSSTATE(GPIO_0, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ + PAD_CFG_NF_IOSSTATE(GPIO_1, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ + PAD_CFG_NF_IOSSTATE(GPIO_2, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ + PAD_CFG_NF_IOSSTATE(GPIO_3, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ + PAD_CFG_NF_IOSSTATE(GPIO_4, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ + PAD_CFG_NF_IOSSTATE(GPIO_5, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ + PAD_CFG_NF_IOSSTATE(GPIO_6, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ + PAD_CFG_NF_IOSSTATE(GPIO_7, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ + PAD_CFG_NF_IOSSTATE(GPIO_8, DN_20K, DEEP, NF1, HIZCRx0), /* n/a */ + PAD_CFG_GPO(GPIO_9, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_10, 1, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_11, 1, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_12, 1, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_13, 1, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_14, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_15, 1, DEEP), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_16, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_17, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_18, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPO(GPIO_19, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_20, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_21, 1, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_22, 1, DEEP), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_23, NONE, DEEP, OFF, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_24, NONE, DEEP, OFF, ACPI), /* GPIO */ + PAD_CFG_GPO(GPIO_25, 1, DEEP), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_26, NONE, DEEP, OFF, ACPI), /* GPIO */ + PAD_CFG_GPO(GPIO_27, 1, DEEP), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_28, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_29, NONE, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_30, NONE, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_31, NONE, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_32, NONE, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPI_APIC_IOS(GPIO_33, DN_20K, DEEP, EDGE_SINGLE, NONE, IGNORE, SAME), /* GPIO */ + PAD_CFG_NF(GPIO_34, DN_20K, DEEP, NF1), /* PWM0 */ + PAD_CFG_TERM_GPO(GPIO_35, 1, DN_20K, DEEP), /* GPIO */ + PAD_CFG_NF(GPIO_36, DN_20K, DEEP, NF1), /* PWM2 */ + PAD_CFG_NF(GPIO_37, DN_20K, DEEP, NF1), /* PWM3 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART0_TXD */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_40, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART0_RTS_N */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_41, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_CTS_N */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART1_RXD */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, UP_20K, DEEP, NF1, HIZCRx0, DISPUPD), /* LPSS_UART1_TXD */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_44, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART1_RTS_N */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_45, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* LPSS_UART1_CTS_N */ + PAD_CFG_NF(GPIO_46, UP_20K, DEEP, NF1), /* LPSS_UART2_RXD */ + PAD_CFG_NF(GPIO_47, UP_20K, DEEP, NF1), /* LPSS_UART2_TXD */ + PAD_CFG_GPI_TRIG_OWN(GPIO_48, UP_20K, DEEP, OFF, ACPI), /* GPIO */ + PAD_CFG_NF(GPIO_49, UP_20K, DEEP, NF1), /* LPSS_UART2_CTS_N */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_62, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_63, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_64, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_65, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_66, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_67, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_68, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_69, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_70, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_71, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_72, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_73, 0, DEEP, DN_20K, HIZCRx0, SAME), /* GPIO */ + PAD_CFG_NF_IOSTANDBY_IGNORE(TCK, DN_20K, DEEP, NF1), /* JTAG_TCK */ + PAD_CFG_NF_IOSTANDBY_IGNORE(TRST_B, DN_20K, DEEP, NF1), /* JTAG_TRST_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(TMS, UP_20K, DEEP, NF1), /* JTAG_TMS */ + PAD_CFG_NF_IOSTANDBY_IGNORE(TDI, UP_20K, DEEP, NF1), /* JTAG_TDI */ + PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PMODE, NONE, DEEP, NF1), /* JTAG_PMODE */ + PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PREQ_B, UP_20K, DEEP, NF1), /* JTAG_PREQ_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(JTAGX, UP_20K, DEEP, NF1), /* JTAGX */ + PAD_CFG_NF_IOSTANDBY_IGNORE(CX_PRDY_B, UP_20K, DEEP, NF1), /* JTAG_PRDY_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(TDO, UP_20K, DEEP, NF1), /* JTAG_TDO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(CNV_BRI_DT, DN_20K, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(CNV_BRI_RSP, DN_20K, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_TERM_GPO(CNV_RGI_DT, 1, UP_1K, DEEP), /* GPIO */ + /* CNV_RGI_RSP - RESERVED */ + PAD_CFG_NF_IOSTANDBY_IGNORE(SVID0_ALERT_B, NONE, DEEP, NF1), /* SVID0_ALERT_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(SVID0_DATA, UP_20K, DEEP, NF1), /* SVID0_DATA */ + PAD_CFG_NF_IOSTANDBY_IGNORE(SVID0_CLK, UP_20K, DEEP, NF1), /* SVID0_CLK */ + + /* --- GPIO Community NorthWest --- */ + + /* ----- GPIO Group NorthWest ----- */ + PAD_CFG_NF_IOSSTATE(GPIO_187, UP_20K, DEEP, NF1, HIZCRx0), /* DDI0_DDC_SDA */ + PAD_CFG_NF_IOSSTATE(GPIO_188, UP_20K, DEEP, NF1, HIZCRx0), /* DDI0_DDC_SCL */ + PAD_CFG_NF(GPIO_189, UP_2K, DEEP, NF1), /* DDI1_DDC_SDA */ + PAD_CFG_NF(GPIO_190, UP_2K, DEEP, NF1), /* DDI1_DDC_SCL */ + PAD_CFG_NF(GPIO_191, DN_20K, DEEP, NF1), /* MIPI_I2C_SDA */ + PAD_CFG_NF(GPIO_192, DN_20K, DEEP, NF1), /* MIPI_I2C_SCL */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_193, 1, DEEP, DN_20K, Tx0RxDCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_194, 1, DEEP, DN_20K, Tx0RxDCRx0, SAME), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_195, 1, DEEP, DN_20K, Tx0RxDCRx0, SAME), /* GPIO */ + PAD_CFG_TERM_GPO(GPIO_196, 1, DN_20K, DEEP), /* GPIO */ + PAD_CFG_TERM_GPO(GPIO_197, 1, DN_20K, DEEP), /* GPIO */ + PAD_CFG_TERM_GPO(GPIO_198, 1, DN_20K, DEEP), /* GPIO */ + PAD_CFG_NF(GPIO_199, UP_20K, DEEP, NF2), /* DDI1_HPD */ + PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2), /* DDI0_HPD */ + PAD_CFG_NF_IOSSTATE(GPIO_201, DN_20K, DEEP, NF1, Tx0RxDCRx0), /* MDSI_A_TE */ + PAD_CFG_NF_IOSSTATE(GPIO_202, DN_20K, DEEP, NF1, Tx0RxDCRx0), /* MDSI_C_TE */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_203, UP_20K, DEEP, NF1), /* USB_OC0_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_204, UP_20K, DEEP, NF1), /* USB_OC1_N */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_FS0, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_FS1, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(PMC_SPI_FS2, 1, DEEP, NONE, IGNORE, SAME), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_RXD, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_TXD, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMC_SPI_CLK, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_TERM_GPO(PMIC_PWRGOOD, 1, UP_1K, DEEP), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMIC_RESET_B, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_213, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_214, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(GPIO_215, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_NF(PMIC_THERMTRIP_B, UP_20K, DEEP, NF1), /* THERMTRIP_N */ + PAD_CFG_GPI_TRIG_IOSSTATE_OWN(PMIC_STDBY, NONE, DEEP, OFF, IGNORE, ACPI), /* GPIO */ + PAD_CFG_NF_IOSSTATE(PROCHOT_B, UP_20K, DEEP, NF1, HIZCRx1), /* PROCHOT_N */ + /* PMIC_I2C_SCL - RESERVED */ + /* PMIC_I2C_SDA - RESERVED */ + PAD_CFG_NF(GPIO_74, DN_20K, DEEP, NF1), /* AVS_I2S1_MCLK */ + PAD_CFG_NF(GPIO_75, DN_20K, DEEP, NF1), /* AVS_I2S1_BCLK */ + PAD_CFG_TERM_GPO(GPIO_76, 1, DN_20K, DEEP), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_77, DN_20K, DEEP, OFF, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_78, DN_20K, DEEP, OFF, ACPI), /* GPIO */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_79, DN_20K, DEEP, NF2), /* AVS_I2S4_BCLK */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_80, DN_20K, DEEP, NF2), /* AVS_I2S4_WS_SYNC */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_81, DN_20K, DEEP, NF2, TxDRxE, ENPD), /* AVS_I2C4_SDI */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_82, DN_20K, DEEP, NF2), /* AVS_I2S4_SDO */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_83, DN_20K, DEEP, NF1, TxDRxE, ENPD), /* AVS_DMIC_DATA_2 */ + PAD_CFG_NF(GPIO_84, DN_20K, DEEP, NF2), /* AVS_HDA_RST_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_85, DN_20K, DEEP, NF1), /* AVS_I2S2_BCLK */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_86, DN_20K, DEEP, NF1), /* AVS_I2S2_WS_SYNC */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_87, DN_20K, DEEP, NF1), /* AVS_I2S2_SDI */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_88, DN_20K, DEEP, NF1), /* AVS_I2S2_SDO */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_89, DN_20K, DEEP, NF1), /* AVS_I2S3_BCLK */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_90, DN_20K, DEEP, NF1), /* AVS_I2S3_WS_SYNC */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_91, DN_20K, DEEP, NF1, TxDRxE, ENPD), /* AVS_I2S3_SDI */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_92, DN_20K, DEEP, NF1), /* AVS_I2S3_SDO */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_97, NATIVE, DEEP, NF1), /* FST_SPI_CS0_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_98, NATIVE, DEEP, NF1), /* FST_SPI_CS1_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_99, NATIVE, DEEP, NF1), /* FST_SPI_MOSI_IO0 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_100, NATIVE, DEEP, NF1), /* FST_SPI_MISO_IO1 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_101, NATIVE, DEEP, NF1), /* FST_SPI_IO2 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_102, NATIVE, DEEP, NF1), /* FST_SPI_IO3 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_103, NATIVE, DEEP, NF1), /* FST_SPI_CLK */ + PAD_CFG_NF_IOSTANDBY_IGNORE(FST_SPI_CLK_FB, NONE, DEEP, NF1), /* n/a */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_104, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_CLK */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_105, UP_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_FS0 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, UP_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_FS1 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_109, UP_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_RXD */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_110, UP_20K, DEEP, NF1, HIZCRx0, ENPD), /* SIO_SPI_0_TXD */ + PAD_CFG_GPI_TRIG_OWN(GPIO_111, DN_20K, DEEP, OFF, ACPI), /* GPIO */ + PAD_CFG_NF(GPIO_112, DN_20K, DEEP, NF2), /* n/a */ + PAD_CFG_GPI_TRIG_OWN(GPIO_113, DN_20K, DEEP, OFF, ACPI), /* GPIO */ + PAD_CFG_NF(GPIO_116, DN_20K, DEEP, NF2), /* n/a */ + PAD_CFG_NF(GPIO_117, DN_20K, DEEP, NF2), /* n/a */ + PAD_CFG_NF(GPIO_118, DN_20K, DEEP, NF1), /* SIO_SPI_2_CLK */ + PAD_CFG_NF(GPIO_119, DN_20K, DEEP, NF1), /* SIO_SPI_2_FS0 */ + PAD_CFG_NF(GPIO_120, DN_20K, DEEP, NF1), /* SIO_SPI_2_FS1 */ + PAD_CFG_NF(GPIO_121, DN_20K, DEEP, NF1), /* SIO_SPI_2_FS2 */ + PAD_CFG_NF(GPIO_122, DN_20K, DEEP, NF1), /* SIO_SPI_2_RXD */ + PAD_CFG_NF(GPIO_123, DN_20K, DEEP, NF1), /* SIO_SPI_2_TXD */ + + /* ------ GPIO Community West ----- */ + + /* -------- GPIO Group West ------- */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_124, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C0_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_125, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C0_SCL */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_126, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C1_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_127, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C1_SCL */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_128, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C2_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_129, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C2_SCL */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_130, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C3_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_131, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C3_SCL */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_132, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C4_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_133, UP_1K, DEEP, NF1, Tx1RxDCRx1, ENPU), /* LPSS_I2C4_SCL */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_134, NONE, DEEP, NF2, IGNORE, ENPU), /* ISH_I2C0_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_135, NONE, DEEP, NF2, IGNORE, ENPU), /* ISH_I2C0_SCL */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_136, NONE, DEEP, NF2, IGNORE, ENPU), /* ISH_I2C1_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_137, NONE, DEEP, NF2, IGNORE, ENPU), /* ISH_I2C1_SCL */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_138, UP_1K, DEEP, NF1, Tx0RxDCRx0, ENPU), /* LPSS_I2C7_SDA */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_139, UP_1K, DEEP, NF1, Tx0RxDCRx0, ENPU), /* LPSS_I2C7_SCL */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_146, DN_20K, DEEP, NF3), /* AVS_HDA_BCLK */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_147, DN_20K, DEEP, NF3), /* AVS_HDA_WS_SYNC */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_148, DN_20K, DEEP, NF3), /* AVS_HDA_SDI */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_149, 1, DEEP, DN_20K, IGNORE, SAME), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_150, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_151, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_NF(GPIO_152, DN_20K, DEEP, NF2), /* AVS_I2S5_SDI */ + PAD_CFG_GPI_TRIG_OWN(GPIO_153, NONE, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPI_TRIG_OWN(GPIO_154, UP_20K, DEEP, LEVEL, ACPI), /* GPIO */ + PAD_CFG_GPO(GPIO_155, 1, DEEP), /* GPIO */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_209, NONE, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ0_N */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_210, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ1_N */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_211, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ2_N */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_212, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ3_N */ + PAD_CFG_NF(OSC_CLK_OUT_0, DN_20K, DEEP, NF1), /* OSC_CLK_OUT_0 */ + PAD_CFG_NF(OSC_CLK_OUT_1, DN_20K, DEEP, NF1), /* OSC_CLK_OUT_1 */ + PAD_CFG_NF(OSC_CLK_OUT_2, DN_20K, DEEP, NF1), /* OSC_CLK_OUT_2 */ + PAD_CFG_NF(OSC_CLK_OUT_3, DN_20K, DEEP, NF1), /* OSC_CLK_OUT_3 */ + PAD_CFG_GPI_TRIG_OWN(OSC_CLK_OUT_4, DN_20K, DEEP, OFF, ACPI), /* GPIO */ + PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_AC_PRESENT, DN_20K, DEEP, NF1), /* PMU_AC_PRESENT */ + PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_BATLOW_B, UP_20K, DEEP, NF1), /* PMU_BATLOW_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PLTRST_B, NONE, DEEP, NF1), /* PMU_PLTRST_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_PWRBTN_B, UP_20K, DEEP, NF1), /* PMU_PWRBTN_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_RESETBUTTON_B, NONE, DEEP, NF1), /* PMU_RSTBTN_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S0_B, NONE, DEEP, NF1), /* PMU_SLP_S0_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S3_B, NONE, DEEP, NF1), /* PMU_SLP_S3_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SLP_S4_B, NONE, DEEP, NF1), /* PMU_SLP_S4_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(PMU_SUSCLK, NONE, DEEP, NF1), /* PMU_SUSCLK */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(PMU_WAKE_B, 1, DEEP, UP_20K, IGNORE, SAME), /* GPIO */ + PAD_CFG_NF_IOSTANDBY_IGNORE(SUS_STAT_B, NONE, DEEP, NF1), /* SUS_STAT_B */ + PAD_CFG_NF_IOSTANDBY_IGNORE(SUSPWRDNACK, NONE, DEEP, NF1), /* SUSPWRDNACK */ + + /* --- GPIO Community SouthWest --- */ + + /* ----- GPIO Group SouthWest ----- */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_205, UP_20K, DEEP, NF1), /* PCIE_WAKE0_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_206, UP_20K, DEEP, NF1), /* PCIE_WAKE1_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_207, UP_20K, DEEP, NF1), /* PCIE_WAKE2_N */ + PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_208, UP_20K, DEEP, NF1), /* PCIE_WAKE3_N */ + PAD_CFG_NF_IOSSTATE(GPIO_156, DN_20K, DEEP, NF1, Tx0RxDCRx0), /* EMMC_CLK */ + PAD_CFG_NF_IOSSTATE(GPIO_157, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D0 */ + PAD_CFG_NF_IOSSTATE(GPIO_158, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D1 */ + PAD_CFG_NF_IOSSTATE(GPIO_159, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D2 */ + PAD_CFG_NF_IOSSTATE(GPIO_160, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D3 */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_161, 1, DEEP, UP_20K, HIZCRx1, SAME), /* GPIO */ + PAD_CFG_NF_IOSSTATE(GPIO_162, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D5 */ + PAD_CFG_NF_IOSSTATE(GPIO_163, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D6 */ + PAD_CFG_NF_IOSSTATE(GPIO_164, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_D7 */ + PAD_CFG_NF_IOSSTATE(GPIO_165, UP_20K, DEEP, NF1, HIZCRx1), /* EMMC_CMD */ + PAD_CFG_NF_IOSSTATE(GPIO_166, DN_20K, DEEP, NF1, Tx0RxDCRx0), /* GPIO_166 */ + PAD_CFG_NF_IOSSTATE(GPIO_167, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_167 */ + PAD_CFG_NF_IOSSTATE(GPIO_168, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_168 */ + PAD_CFG_NF_IOSSTATE(GPIO_169, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_169 */ + PAD_CFG_NF_IOSSTATE(GPIO_170, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_170 */ + PAD_CFG_NF_IOSSTATE(GPIO_171, UP_20K, DEEP, NF1, HIZCRx1), /* GPIO_171 */ + PAD_CFG_GPO(GPIO_172, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_179, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_173, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_174, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_175, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_176, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_177, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_178, 0, DEEP), /* GPIO */ + PAD_CFG_GPO(GPIO_186, 0, DEEP), /* GPIO */ + PAD_CFG_NF_IOSSTATE(GPIO_182, DN_20K, DEEP, NF1, HIZCRx0), /* EMMC_RCLK */ + PAD_CFG_TERM_GPO(GPIO_183, 0, DN_20K, DEEP), /* GPIO */ + PAD_CFG_TERM_GPO(SMB_ALERTB, 0, UP_20K, DEEP), /* GPIO */ + PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_CLK, UP_20K, DEEP, NF1), /* SMB_CLK */ + PAD_CFG_NF_IOSTANDBY_IGNORE(SMB_DATA, UP_20K, DEEP, NF1), /* SMB_DATA */ + PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), /* LPC_ILB_SERIRQ */ + PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_CLKOUT0, NONE, DEEP, NF1), /* LPC_CLKOUT0 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_CLKOUT1, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_CLKOUT1 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD0, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_AD0 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD1, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_AD1 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD2, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_AD2 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_AD3, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_AD3 */ + PAD_CFG_NF_IOSTANDBY_IGNORE(LPC_CLKRUNB, UP_20K, DEEP, NF1), /* LPC_CLKRUNB */ + PAD_CFG_NF_IOSSTATE_IOSTERM(LPC_FRAMEB, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPC_FRAMEB */ +}; + +#endif /* CFG_GPIO_H */ diff --git a/src/mainboard/synology/ds918plus/gpio_early.h b/src/mainboard/synology/ds918plus/gpio_early.h new file mode 100644 index 0000000..ad8ee37 --- /dev/null +++ b/src/mainboard/synology/ds918plus/gpio_early.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/gpio.h> + +#ifndef CFG_GPIO_EARLY_H +#define CFG_GPIO_EARLY_H + +/* GPIOs needed prior to ramstage. */ +static const struct pad_config early_gpio_table[] = { + + /* ------- GPIO Group North ------- */ + + PAD_CFG_NF(GPIO_46, UP_20K, DEEP, NF1), /* LPSS_UART2_RXD */ + PAD_CFG_NF(GPIO_47, UP_20K, DEEP, NF1), /* LPSS_UART2_TXD */ + + PAD_CFG_NF(GPIO_134, UP_20K, DEEP, NF2), /* ISH_I2C0_SDA */ + PAD_CFG_NF(GPIO_135, UP_20K, DEEP, NF2), /* ISH_I2C0_SCL */ + PAD_CFG_NF(GPIO_136, UP_20K, DEEP, NF2), /* ISH_I2C1_SDA */ + PAD_CFG_NF(GPIO_137, UP_20K, DEEP, NF2), /* ISH_I2C1_SCL */ + + PAD_CFG_NF(GPIO_0, DN_20K, DEEP, NF1), /* n/a */ + PAD_CFG_NF(GPIO_1, DN_20K, DEEP, NF1), /* n/a */ + PAD_CFG_NF(GPIO_2, DN_20K, DEEP, NF1), /* n/a */ + PAD_CFG_NF(GPIO_3, DN_20K, DEEP, NF1), /* n/a */ + PAD_CFG_NF(GPIO_4, DN_20K, DEEP, NF1), /* n/a */ + PAD_CFG_NF(GPIO_5, DN_20K, DEEP, NF1), /* n/a */ + PAD_CFG_NF(GPIO_6, DN_20K, DEEP, NF1), /* n/a */ + PAD_CFG_NF(GPIO_7, DN_20K, DEEP, NF1), /* n/a */ + PAD_CFG_NF(GPIO_8, DN_20K, DEEP, NF1), /* n/a */ + + /* EXP_I2C_SDA and I2C_PSS_SDA and I2C_2_SDA_IOEXP */ + PAD_CFG_NF(GPIO_7, UP_1K, DEEP, NF1), + /* EXP_I2C_SCL and I2C_PSS_SCL and I2C_2_SCL_IOEXP */ + PAD_CFG_NF(GPIO_8, UP_1K, DEEP, NF1), + + PAD_CFG_GPO(GPIO_13, 0, DEEP), /* PERST# */ + PAD_CFG_GPO(GPIO_15, 0, DEEP), /* PERST# */ + PAD_CFG_GPO(GPIO_17, 1, DEEP), /* PFET */ + PAD_CFG_GPO(GPIO_19, 1, DEEP), /* PFET */ + PAD_CFG_GPO(GPIO_152, 0, DEEP), /* PERST# */ + + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_210, DN_20K, DEEP, NF1, HIZCRx0, ENPD), /* PCIE_CLKREQ1_N */ + + /* ------- GPIO Group South-West ------- */ + + PAD_CFG_NF(SMB_CLK, UP_20K, DEEP, NF1), /* SMB_CLK */ + PAD_CFG_NF(SMB_DATA, UP_20K, DEEP, NF1), /* SMB_DATA */ + PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1), /* LPC_ILB_SERIRQ */ + PAD_CFG_NF(LPC_CLKOUT0, NONE, DEEP, NF1), /* LPC_CLKOUT0 */ + PAD_CFG_NF(LPC_CLKOUT1, NONE, DEEP, NF1), /* LPC_CLKOUT1 */ + PAD_CFG_NF(LPC_AD0, UP_20K, DEEP, NF1), /* LPC_AD0 */ + PAD_CFG_NF(LPC_AD1, UP_20K, DEEP, NF1), /* LPC_AD1 */ + PAD_CFG_NF(LPC_AD2, UP_20K, DEEP, NF1), /* LPC_AD2 */ + PAD_CFG_NF(LPC_AD3, UP_20K, DEEP, NF1), /* LPC_AD3 */ + PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1), /* LPC_CLKRUNB */ + PAD_CFG_NF(LPC_FRAMEB, UP_20K, DEEP, NF1), /* LPC_FRAMEB */ + + /* ------- GPIO Group North ------- */ + + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_38, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_39, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART0_TXD */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_42, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART1_RXD */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_43, UP_20K, DEEP, NF1, HIZCRx0, DISPUPD), /* LPSS_UART1_TXD */ +}; + +#endif /* CFG_GPIO_EARLY_H */ diff --git a/src/mainboard/synology/ds918plus/mainboard.c b/src/mainboard/synology/ds918plus/mainboard.c index d0520e8..bae5e74 100644 --- a/src/mainboard/synology/ds918plus/mainboard.c +++ b/src/mainboard/synology/ds918plus/mainboard.c @@ -1,16 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <device/device.h> +#include <soc/gpio.h> + #include "gpio.h"
static void mainboard_init(void *chip_info) { - const struct pad_config *pads; - size_t num; - /* Configure GPIOs in Ramstage */ - pads = gpio_table(&num); - gpio_configure_pads(pads, num); + gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); }
struct chip_operations mainboard_ops = {
-
Name of user not set (Code Review)