Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63169 )
Change subject: soc/intel/common: Update CSE sub partition update ......................................................................
soc/intel/common: Update CSE sub partition update
The patch adds support in the CSE Sub partition update procedure to use GET_BOOT_PARTITION_INFO HECI command output to create the region device for CSE RO and CSE RW. The GET_BOOT_PARTITION_INFO HECI command provides CSE's RO and RW boot partition information.
Existing code relies on FMD file to get the CSE's boot partition's (CSE RO and CSE RW) start and size details. This change make independent of FMD file declaration with respect to CSE RO and CSE RW.
TEST=Build and verify the CSE RO and CSE RW region device information through code instrumentation.
Signed-off-by: Sridhar Siricilla sridhar.siricilla@intel.com Change-Id: Ie9a83b77ab44ea6ffe5bb20673e109a89a148629 --- M src/soc/intel/common/block/cse/cse_lite.c 1 file changed, 33 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/63169/1
diff --git a/src/soc/intel/common/block/cse/cse_lite.c b/src/soc/intel/common/block/cse/cse_lite.c index 2756814..d86c41d 100644 --- a/src/soc/intel/common/block/cse/cse_lite.c +++ b/src/soc/intel/common/block/cse/cse_lite.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <arch/cpu.h> #include <console/console.h> #include <cbfs.h> #include <commonlib/region.h> @@ -9,7 +10,6 @@ #include <security/vboot/vboot_common.h> #include <security/vboot/misc.h> #include <soc/intel/common/reset.h> -#include <arch/cpu.h>
#define BPDT_HEADER_SZ sizeof(struct bpdt_header) #define BPDT_ENTRY_SZ sizeof(struct bpdt_entry) @@ -779,15 +779,42 @@ } }
-static bool cse_sub_part_get_target_rdev(struct region_device *target_rdev, - const char *region_name, enum bpdt_entry_type type) +static bool cse_locate_area_as_rdev_rw(const struct cse_bp_info *cse_bp_info, const char *region_name, + struct region_device *cse_rdev) +{ + struct region_device cse_region_rdev; + size_t size; + uint32_t start_offset; + uint32_t end_offset; + + if (!cse_get_rw_rdev(&cse_region_rdev)) + return false; + + if (!strcmp(region_name, "RO")) + cse_get_bp_entry_range(cse_bp_info, RO, &start_offset, &end_offset); + else + cse_get_bp_entry_range(cse_bp_info, RW, &start_offset, &end_offset); + + size = end_offset + 1 - start_offset; + + if (rdev_chain(cse_rdev, &cse_region_rdev, start_offset, size)) + return false; + + printk(BIOS_DEBUG, "cse_lite: CSE %s partition: offset = 0x%x, size = 0x%x\n", region_name, + (uint32_t)start_offset, (uint32_t) size); + + return true; +} + +static bool cse_sub_part_get_target_rdev(const struct cse_bp_info *cse_bp_info, + struct region_device *target_rdev, const char *region_name, enum bpdt_entry_type type) { struct bpdt_header bpdt_hdr; struct region_device cse_rdev; struct bpdt_entry bpdt_entries[MAX_SUBPARTS]; uint8_t i;
- if (fmap_locate_area_as_rdev_rw(region_name, &cse_rdev) < 0) { + if (cse_locate_area_as_rdev_rw(cse_bp_info, region_name, &cse_rdev)) { printk(BIOS_ERR, "cse_lite: Failed to locate %s in the FMAP\n", region_name); return false; } @@ -925,7 +952,7 @@ struct fw_version target_fw_ver, source_fw_ver; enum csme_failure_reason rv; size_t size; - static const char * const cse_regions[] = {"CSE_RO", "CSE_RW"}; + static const char * const cse_regions[] = {"RO", "RW"};
void *subpart_cbfs_rw = cbfs_map(name, &size); if (!subpart_cbfs_rw) { @@ -941,7 +968,7 @@
/* Trigger sub-partition update in CSE RO and CSE RW */ for (size_t bp = 0; bp < ARRAY_SIZE(cse_regions); bp++) { - if (!cse_sub_part_get_target_rdev(&target_rdev, cse_regions[bp], type)) { + if (!cse_sub_part_get_target_rdev(cse_bp_info, &target_rdev, cse_regions[bp], type)) { rv = CSE_LITE_SKU_SUB_PART_ACCESS_ERR; goto error_exit; }