Jett Rink has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32831
Change subject: mb/google/sarien: leave gpio pads unlocks during fsp ......................................................................
mb/google/sarien: leave gpio pads unlocks during fsp
The FSP will lock down the configuration of GPP_A12, which makes the configuration of the GPIO pin on warm reset not work correctly.
This is only needed for the Arcada variant since it is the only variant that uses ISH.
BRANCH=sarien BUG=b:132719369 TEST=ISH_GP6 now works on warm resets on arcarda
Change-Id: Icb3bae2c48eee053189f1a878f5975c6afe51c71 Signed-off-by: Jett Rink jettrink@chromium.org --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/32831/1
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 27c61f3..b6377ba 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -26,6 +26,7 @@ register "PchPmSlpS4MinAssert" = "4" # 4s register "PchPmSlpSusMinAssert" = "4" # 4s register "PchPmSlpAMinAssert" = "4" # 2s + register "PchUnlockGpioPads" = "1"
register "speed_shift_enable" = "1" register "psys_pmax" = "140"
Jett Rink has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32831 )
Change subject: mb/google/sarien: leave gpio pads unlocks during fsp ......................................................................
Patch Set 1: Code-Review+1
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32831 )
Change subject: mb/google/sarien: leave gpio pads unlocks during fsp ......................................................................
Patch Set 1: Code-Review+2
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32831 )
Change subject: mb/google/sarien: leave gpio pads unlocks during fsp ......................................................................
Patch Set 1: Code-Review+2
Duncan Laurie has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32831 )
Change subject: mb/google/sarien: leave gpio pads unlocks during fsp ......................................................................
mb/google/sarien: leave gpio pads unlocks during fsp
The FSP will lock down the configuration of GPP_A12, which makes the configuration of the GPIO pin on warm reset not work correctly.
This is only needed for the Arcada variant since it is the only variant that uses ISH.
BRANCH=sarien BUG=b:132719369 TEST=ISH_GP6 now works on warm resets on arcarda
Change-Id: Icb3bae2c48eee053189f1a878f5975c6afe51c71 Signed-off-by: Jett Rink jettrink@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/32831 Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Duncan Laurie dlaurie@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb 1 file changed, 1 insertion(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved Furquan Shaikh: Looks good to me, approved Jett Rink: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 27c61f3..b6377ba 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -26,6 +26,7 @@ register "PchPmSlpS4MinAssert" = "4" # 4s register "PchPmSlpSusMinAssert" = "4" # 4s register "PchPmSlpAMinAssert" = "4" # 2s + register "PchUnlockGpioPads" = "1"
register "speed_shift_enable" = "1" register "psys_pmax" = "140"
-
Duncan Laurie (Code Review) -
Furquan Shaikh (Code Review)
-
Jett Rink (Code Review)