Change in coreboot[master]: soc/intel: cnl,icl,elh,jsl,tgl: enable C6DRAM

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45417 )

Change subject: soc/intel: cnl,icl,elh,jsl,tgl: enable C6DRAM
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Patch Set 2:

So I went back and reviewed the literature, and there have been instances on several chipsets where the c6dram feature was broken in certain ucode releases. I think this is reason enough to leave this off by default, but leave the option open in the devicetree