Change in coreboot[master]: soc/intel/cannonlake: Use common mca_configure() API

[Pratikkumar V Prajapati (Code Review)]

Pratikkumar V Prajapati has uploaded this change for review. ( https://review.coreboot.org/21241

Change subject: soc/intel/cannonlake: Use common mca_configure() API
......................................................................

soc/intel/cannonlake: Use common mca_configure() API

Use mca_configure() API from cpulib to configure
Intel Machine Check Architecture (MCA)

Change-Id: Ib4943a7f7929775bd5e9945462e530ef68a398b8
Signed-off-by: Pratik Prajapati 
---
M src/soc/intel/cannonlake/cpu.c
1 file changed, 4 insertions(+), 24 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/21241/1

diff --git a/src/soc/intel/cannonlake/cpu.c b/src/soc/intel/cannonlake/cpu.c
index ec979f0..2faadfd 100644
--- a/src/soc/intel/cannonlake/cpu.c
+++ b/src/soc/intel/cannonlake/cpu.c
@@ -129,29 +129,6 @@
    wrmsr(IA32_ENERGY_PERFORMANCE_BIAS, msr);
 }

-static void configure_mca(void)
-{
-	msr_t msr;
-	int i;
-	int num_banks;
-
-	msr = rdmsr(IA32_MCG_CAP);
-	num_banks = msr.lo & 0xff;
-	msr.lo = msr.hi = 0;
-	/*
-	 * TODO(adurbin): This should only be done on a cold boot. Also, some
-	 * of these banks are core vs package scope. For now every CPU clears
-	 * every bank.
-	 */
-	for (i = 0; i < num_banks; i++) {
-		/* Clear the machine check status */
-		wrmsr(IA32_MC0_STATUS + (i * 4), msr);
-		/* Initialize machine checks */
-		wrmsr(IA32_MC0_CTL + i * 4,
-			(msr_t) {.lo = 0xffffffff, .hi = 0xffffffff});
-	}
-}
-
 static void configure_c_states(void)
 {
    msr_t msr;
@@ -194,7 +171,10 @@
 void soc_core_init(device_t cpu)
 {
    /* Clear out pending MCEs */
-	configure_mca();
+	/* TODO(adurbin): This should only be done on a cold boot. Also, some
+	 * of these banks are core vs package scope. For now every CPU clears
+	 * every bank. */
+	mca_configure();

/* Enable the local CPU apics */
    enable_lapic_tpr();