[S] Change in coreboot[master]: soc/intel/cmn/cpu: API to disable 3-strike Machine Check CAT error

[Paul Menzel (Code Review)]

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal, Ivy Jian, Eric Lai, Lean Sheng Tan, Ronak Kanabar.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74158 )

Change subject: soc/intel/cmn/cpu: API to disable 3-strike Machine Check CAT error
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Patch Set 3:

(6 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/74158/comment/cbe1a0e4_09348fd0 
PS3, Line 7: API to disable 3-strike Machine Check CAT error
Please make it a statement by adding a verb (in imperative mood). Also it’s just one function, so maybe:
> Add function to …

https://review.coreboot.org/c/coreboot/+/74158/comment/6a6d27ad_a13a362b 
PS3, Line 8: 
Please describe the problem, including what CAT means, and maybe a reference to the documentation of that counter.

https://review.coreboot.org/c/coreboot/+/74158/comment/cda0abfb_435f113d 
PS3, Line 10: would help
helps

https://review.coreboot.org/c/coreboot/+/74158/comment/5307a652_3d6ed963 
PS3, Line 9: This patch prevents the Three Strike Counter from incrementing,
           : which would help to disable Machine Check Catastrophic error.
           : It will provide more opportunity to collect more useful CPU
           : traces for debugging.
Please use the fully allowed text width of 72 characters per line.

File src/soc/intel/common/block/include/intelblocks/cpulib.h:

https://review.coreboot.org/c/coreboot/+/74158/comment/9adac654_aef33709 
PS3, Line 227: ,
.

https://review.coreboot.org/c/coreboot/+/74158/comment/ab1a71d7_4258d791 
PS3, Line 228: it will help
It helps