Change in coreboot[master]: src/drivers/spi: Use common 'SPI_OPCODE_*'

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45092 )

Change subject: src/drivers/spi:  Use common 'SPI_OPCODE_*'
......................................................................

src/drivers/spi:  Use common 'SPI_OPCODE_*'

Change-Id: Ie0ec13ba56c813ffc5a62c3013f32221061ae94d
Signed-off-by: Elyes HAOUAS 
---
M src/drivers/spi/adesto.c
M src/drivers/spi/amic.c
M src/drivers/spi/atmel.c
M src/drivers/spi/eon.c
M src/drivers/spi/gigadevice.c
M src/drivers/spi/macronix.c
M src/drivers/spi/spansion.c
M src/drivers/spi/sst.c
M src/drivers/spi/stmicro.c
M src/include/spi_flash.h
10 files changed, 20 insertions(+), 128 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/45092/1

diff --git a/src/drivers/spi/adesto.c b/src/drivers/spi/adesto.c
index 6538905..9e786e0 100644
--- a/src/drivers/spi/adesto.c
+++ b/src/drivers/spi/adesto.c
@@ -12,20 +12,6 @@

#include "spi_flash_internal.h"

-/* at25dfxx-specific commands */
-#define CMD_AT25DF_WREN		0x06	/* Write Enable */
-#define CMD_AT25DF_WRDI		0x04	/* Write Disable */
-#define CMD_AT25DF_RDSR		0x05	/* Read Status Register */
-#define CMD_AT25DF_WRSR		0x01	/* Write Status Register */
-#define CMD_AT25DF_READ		0x03	/* Read Data Bytes */
-#define CMD_AT25DF_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
-#define CMD_AT25DF_PP		0x02	/* Page Program */
-#define CMD_AT25DF_SE		0x20	/* Sector (4K) Erase */
-#define CMD_AT25DF_BE		0xd8	/* Block (64K) Erase */
-#define CMD_AT25DF_CE		0xc7	/* Chip Erase */
-#define CMD_AT25DF_DP		0xb9	/* Deep Power-down */
-#define CMD_AT25DF_RES		0xab	/* Release from DP, and Read Signature */
-
 static const struct spi_flash_part_id flash_table[] = {
    {
    	/* AT25SL128A */
diff --git a/src/drivers/spi/amic.c b/src/drivers/spi/amic.c
index 5e74616..9afa9fb 100644
--- a/src/drivers/spi/amic.c
+++ b/src/drivers/spi/amic.c
@@ -7,20 +7,6 @@

#include "spi_flash_internal.h"

-/* A25L-specific commands */
-#define CMD_A25_WREN		0x06	/* Write Enable */
-#define CMD_A25_WRDI		0x04	/* Write Disable */
-#define CMD_A25_RDSR		0x05	/* Read Status Register */
-#define CMD_A25_WRSR		0x01	/* Write Status Register */
-#define CMD_A25_READ		0x03	/* Read Data Bytes */
-#define CMD_A25_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
-#define CMD_A25_PP		0x02	/* Page Program */
-#define CMD_A25_SE		0x20	/* Sector (4K) Erase */
-#define CMD_A25_BE		0xd8	/* Block (64K) Erase */
-#define CMD_A25_CE		0xc7	/* Chip Erase */
-#define CMD_A25_DP		0xb9	/* Deep Power-down */
-#define CMD_A25_RES		0xab	/* Release from DP, and Read Signature */
-
 static const struct spi_flash_part_id flash_table[] = {
    {
    	/* A25L16PU */
diff --git a/src/drivers/spi/atmel.c b/src/drivers/spi/atmel.c
index 4dcc5b5..ab8b0fa 100644
--- a/src/drivers/spi/atmel.c
+++ b/src/drivers/spi/atmel.c
@@ -7,20 +7,6 @@

#include "spi_flash_internal.h"

-/* M25Pxx-specific commands */
-#define CMD_AT25_WREN		0x06	/* Write Enable */
-#define CMD_AT25_WRDI		0x04	/* Write Disable */
-#define CMD_AT25_RDSR		0x05	/* Read Status Register */
-#define CMD_AT25_WRSR		0x01	/* Write Status Register */
-#define CMD_AT25_READ		0x03	/* Read Data Bytes */
-#define CMD_AT25_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
-#define CMD_AT25_PP			0x02	/* Page Program */
-#define CMD_AT25_SE			0x20	/* Sector (4K) Erase */
-#define CMD_AT25_BE			0xd8	/* Block (64K) Erase */
-#define CMD_AT25_CE			0xc7	/* Chip Erase */
-#define CMD_AT25_DP			0xb9	/* Deep Power-down */
-#define CMD_AT25_RES		0xab	/* Release from DP, and Read Signature */
-
 static const struct spi_flash_part_id flash_table[] = {
    {
    	/* AT25X16 */
diff --git a/src/drivers/spi/eon.c b/src/drivers/spi/eon.c
index 1212c6b..f6ef3d0 100644
--- a/src/drivers/spi/eon.c
+++ b/src/drivers/spi/eon.c
@@ -7,19 +7,6 @@

#include "spi_flash_internal.h"

-/* EN25*-specific commands */
-#define CMD_EN25_WREN		0x06	/* Write Enable */
-#define CMD_EN25_WRDI		0x04	/* Write Disable */
-#define CMD_EN25_RDSR		0x05	/* Read Status Register */
-#define CMD_EN25_WRSR		0x01	/* Write Status Register */
-#define CMD_EN25_READ		0x03	/* Read Data Bytes */
-#define CMD_EN25_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
-#define CMD_EN25_PP		0x02	/* Page Program */
-#define CMD_EN25_SE		0x20	/* Sector Erase */
-#define CMD_EN25_BE		0xd8	/* Block Erase */
-#define CMD_EN25_DP		0xb9	/* Deep Power-down */
-#define CMD_EN25_RES		0xab	/* Release from DP, and Read Signature */
-
 #define EON_ID_EN25B80		0x2014
 #define EON_ID_EN25B16		0x2015
 #define EON_ID_EN25B32		0x2016
diff --git a/src/drivers/spi/gigadevice.c b/src/drivers/spi/gigadevice.c
index 6c5a167..0d20758 100644
--- a/src/drivers/spi/gigadevice.c
+++ b/src/drivers/spi/gigadevice.c
@@ -7,20 +7,6 @@

#include "spi_flash_internal.h"

-/* GD25Pxx-specific commands */
-#define CMD_GD25_WREN		0x06	/* Write Enable */
-#define CMD_GD25_WRDI		0x04	/* Write Disable */
-#define CMD_GD25_RDSR		0x05	/* Read Status Register */
-#define CMD_GD25_WRSR		0x01	/* Write Status Register */
-#define CMD_GD25_READ		0x03	/* Read Data Bytes */
-#define CMD_GD25_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
-#define CMD_GD25_PP		0x02	/* Page Program */
-#define CMD_GD25_SE		0x20	/* Sector (4K) Erase */
-#define CMD_GD25_BE		0xd8	/* Block (64K) Erase */
-#define CMD_GD25_CE		0xc7	/* Chip Erase */
-#define CMD_GD25_DP		0xb9	/* Deep Power-down */
-#define CMD_GD25_RES		0xab	/* Release from DP, and Read Signature */
-
 static const struct spi_flash_part_id flash_table[] = {
    {
    	/* GD25T80 */
diff --git a/src/drivers/spi/macronix.c b/src/drivers/spi/macronix.c
index f3f7e2d..f8f773a 100644
--- a/src/drivers/spi/macronix.c
+++ b/src/drivers/spi/macronix.c
@@ -7,20 +7,6 @@

#include "spi_flash_internal.h"

-/* MX25xx-specific commands */
-#define CMD_MX25XX_WREN		0x06	/* Write Enable */
-#define CMD_MX25XX_WRDI		0x04	/* Write Disable */
-#define CMD_MX25XX_RDSR		0x05	/* Read Status Register */
-#define CMD_MX25XX_WRSR		0x01	/* Write Status Register */
-#define CMD_MX25XX_READ		0x03	/* Read Data Bytes */
-#define CMD_MX25XX_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
-#define CMD_MX25XX_PP		0x02	/* Page Program */
-#define CMD_MX25XX_SE		0x20	/* Sector Erase */
-#define CMD_MX25XX_BE		0xD8	/* Block Erase */
-#define CMD_MX25XX_CE		0xc7	/* Chip Erase */
-#define CMD_MX25XX_DP		0xb9	/* Deep Power-down */
-#define CMD_MX25XX_RES		0xab	/* Release from DP, and Read Signature */
-
 #define MACRONIX_SR_WIP		(1 << 0)	/* Write-in-Progress */

static const struct spi_flash_part_id flash_table[] = {
diff --git a/src/drivers/spi/spansion.c b/src/drivers/spi/spansion.c
index fe0e265..ff912bd 100644
--- a/src/drivers/spi/spansion.c
+++ b/src/drivers/spi/spansion.c
@@ -7,20 +7,6 @@

#include "spi_flash_internal.h"

-/* S25FLxx-specific commands */
-#define CMD_S25FLXX_READ	0x03	/* Read Data Bytes */
-#define CMD_S25FLXX_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
-#define CMD_S25FLXX_READID	0x90	/* Read Manufacture ID and Device ID */
-#define CMD_S25FLXX_WREN	0x06	/* Write Enable */
-#define CMD_S25FLXX_WRDI	0x04	/* Write Disable */
-#define CMD_S25FLXX_RDSR	0x05	/* Read Status Register */
-#define CMD_S25FLXX_WRSR	0x01	/* Write Status Register */
-#define CMD_S25FLXX_PP		0x02	/* Page Program */
-#define CMD_S25FLXX_SE		0xd8	/* Sector Erase */
-#define CMD_S25FLXX_BE		0xc7	/* Bulk Erase */
-#define CMD_S25FLXX_DP		0xb9	/* Deep Power-down */
-#define CMD_S25FLXX_RES		0xab	/* Release from DP, and Read Signature */
-
 #define SPSN_ID_S25FL008A	0x0213
 #define SPSN_ID_S25FL016A	0x0214
 #define SPSN_ID_S25FL032A	0x0215
diff --git a/src/drivers/spi/sst.c b/src/drivers/spi/sst.c
index 887380f..02e5129 100644
--- a/src/drivers/spi/sst.c
+++ b/src/drivers/spi/sst.c
@@ -11,15 +11,8 @@

#include "spi_flash_internal.h"

-#define CMD_SST_WREN		0x06	/* Write Enable */
-#define CMD_SST_WRDI		0x04	/* Write Disable */
-#define CMD_SST_RDSR		0x05	/* Read Status Register */
-#define CMD_SST_WRSR		0x01	/* Write Status Register */
 #define CMD_SST_EWSR		0x50	/* Enable Write Status Register */
-#define CMD_SST_READ		0x03	/* Read Data Bytes */
-#define CMD_SST_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
 #define CMD_SST_BP		0x02	/* Byte Program */
-#define CMD_SST_PP		0x02	/* Page Program */
 #define CMD_SST_AAI_WP		0xAD	/* Auto Address Increment Word Program */
 #define CMD_SST_SE		0x20	/* Sector Erase */

@@ -90,7 +83,7 @@
 static int
 sst_enable_writing(const struct spi_flash *flash)
 {
-	int ret = spi_flash_cmd(&flash->spi, CMD_SST_WREN, NULL, 0);
+	int ret = spi_flash_cmd(&flash->spi, SPI_OPCODE_WREN, NULL, 0);
    if (ret)
    	printk(BIOS_WARNING, "SF: Enabling Write failed\n");
    return ret;
@@ -108,7 +101,7 @@
 static int
 sst_disable_writing(const struct spi_flash *flash)
 {
-	int ret = spi_flash_cmd(&flash->spi, CMD_SST_WRDI, NULL, 0);
+	int ret = spi_flash_cmd(&flash->spi, SPI_OPCODE_WRDI, NULL, 0);
    if (ret)
    	printk(BIOS_WARNING, "SF: Disabling Write failed\n");
    return ret;
@@ -127,7 +120,7 @@

#if CONFIG(DEBUG_SPI_FLASH)
    printk(BIOS_SPEW, "BP[%02x]: %p => cmd = { 0x%02x 0x%06x }\n",
-		spi_w8r8(&flash->spi, CMD_SST_RDSR), buf, cmd[0], offset);
+		spi_w8r8(&flash->spi, SPI_OPCODE_RDSR), buf, cmd[0], offset);
 #endif

ret = sst_enable_writing(flash);
@@ -170,7 +163,7 @@
    for (; actual < len - 1; actual += 2) {
 #if CONFIG(DEBUG_SPI_FLASH)
    	printk(BIOS_SPEW, "WP[%02x]: %p => cmd = { 0x%02x 0x%06x }\n",
-		     spi_w8r8(&flash->spi, CMD_SST_RDSR), buf + actual, cmd[0],
+		     spi_w8r8(&flash->spi, SPI_OPCODE_RDSR), buf + actual, cmd[0],
    	     offset);
 #endif

@@ -215,21 +208,21 @@
    if (ret)
    	return ret;

-	cmd = CMD_SST_WRSR;
+	cmd = SPI_OPCODE_WRSR;
    status = 0;
    ret = spi_flash_cmd_write(&flash->spi, &cmd, 1, &status, 1);
    if (ret)
    	printk(BIOS_WARNING, "SF: Unable to set status byte\n");

-	printk(BIOS_INFO, "SF: SST: status = %x\n", spi_w8r8(&flash->spi, CMD_SST_RDSR));
+	printk(BIOS_INFO, "SF: SST: status = %x\n", spi_w8r8(&flash->spi, SPI_OPCODE_RDSR));

return ret;
 }

static const struct spi_flash_ops_descriptor descai = {
    .erase_cmd = CMD_SST_SE,
-	.status_cmd = CMD_SST_RDSR,
-	.wren_cmd = CMD_SST_WREN,
+	.status_cmd = SPI_OPCODE_RDSR,
+	.wren_cmd = SPI_OPCODE_WREN,
    .ops = {
    	.read = spi_flash_cmd_read,
    	.write = sst_write_ai,
diff --git a/src/drivers/spi/stmicro.c b/src/drivers/spi/stmicro.c
index 4cd8c1b..63b6451 100644
--- a/src/drivers/spi/stmicro.c
+++ b/src/drivers/spi/stmicro.c
@@ -7,20 +7,6 @@

#include "spi_flash_internal.h"

-/* M25Pxx-specific commands */
-#define CMD_M25PXX_WREN		0x06	/* Write Enable */
-#define CMD_M25PXX_WRDI		0x04	/* Write Disable */
-#define CMD_M25PXX_RDSR		0x05	/* Read Status Register */
-#define CMD_M25PXX_WRSR		0x01	/* Write Status Register */
-#define CMD_M25PXX_READ		0x03	/* Read Data Bytes */
-#define CMD_M25PXX_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
-#define CMD_M25PXX_PP		0x02	/* Page Program */
-#define CMD_M25PXX_SSE		0x20	/* Subsector Erase */
-#define CMD_M25PXX_SE		0xd8	/* Sector Erase */
-#define CMD_M25PXX_BE		0xc7	/* Bulk Erase */
-#define CMD_M25PXX_DP		0xb9	/* Deep Power-down */
-#define CMD_M25PXX_RES		0xab	/* Release from DP, and Read Signature */
-
 /*
  * Device ID = (memory_type << 8) + memory_capacity
  */
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index 1061e99..d5ba116 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -9,8 +9,18 @@
 #include <boot/coreboot_tables.h>

/* SPI Flash opcodes */
-#define SPI_OPCODE_WREN 0x06
-#define SPI_OPCODE_FAST_READ 0x0b
+#define SPI_OPCODE_WREN		0x06	/* Write Enable */
+#define SPI_OPCODE_WRDI		0x04	/* Write Disable */
+#define SPI_OPCODE_RDSR		0x05	/* Read Status Register */
+#define SPI_OPCODE_WRSR		0x01	/* Write Status Register */
+#define SPI_OPCODE_READ		0x03	/* Read Data Bytes */
+#define SPI_OPCODE_FAST_READ	0x0b	/* Read Data Bytes at Higher Speed */
+#define SPI_OPCODE_PP		0x02	/* Page Program */
+#define SPI_OPCODE_SE		0x20	/* Sector (4K) Erase */
+#define SPI_OPCODE_BE		0xd8	/* Block (64K) Erase */
+#define SPI_OPCODE_CE		0xc7	/* Chip Erase */
+#define SPI_OPCODE_DP		0xb9	/* Deep Power-down */
+#define SPI_OPCODE_RES		0xab	/* Release from DP, and Read Signature */

struct spi_flash;

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45092

to look at the new patch set (#2).

Change subject: src/drivers/spi:  Use common 'SPI_OPCODE_*'
......................................................................

src/drivers/spi:  Use common 'SPI_OPCODE_*'

Change-Id: Ie0ec13ba56c813ffc5a62c3013f32221061ae94d
Signed-off-by: Elyes HAOUAS 
---
M src/drivers/spi/adesto.c
M src/drivers/spi/amic.c
M src/drivers/spi/atmel.c
M src/drivers/spi/eon.c
M src/drivers/spi/gigadevice.c
M src/drivers/spi/macronix.c
M src/drivers/spi/spansion.c
M src/drivers/spi/sst.c
M src/drivers/spi/stmicro.c
M src/include/spi_flash.h
10 files changed, 21 insertions(+), 129 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/45092/2

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45092

to look at the new patch set (#3).

Change subject: src/drivers/spi:  Use common 'SPI_OPCODE_*'
......................................................................

src/drivers/spi:  Use common 'SPI_OPCODE_*'

Change-Id: Ie0ec13ba56c813ffc5a62c3013f32221061ae94d
Signed-off-by: Elyes HAOUAS 
---
M src/drivers/spi/adesto.c
M src/drivers/spi/amic.c
M src/drivers/spi/atmel.c
M src/drivers/spi/eon.c
M src/drivers/spi/gigadevice.c
M src/drivers/spi/macronix.c
M src/drivers/spi/spansion.c
M src/drivers/spi/spi_flash.c
M src/drivers/spi/spi_flash_internal.h
M src/drivers/spi/spi_winbond.h
M src/drivers/spi/sst.c
M src/drivers/spi/stmicro.c
M src/drivers/spi/winbond.c
M src/include/spi_flash.h
14 files changed, 40 insertions(+), 167 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/45092/3

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/45092

to look at the new patch set (#4).

Change subject: src/drivers/spi:  Use common 'SPI_OPCODE_*'
......................................................................

src/drivers/spi:  Use common 'SPI_OPCODE_*'

Change-Id: Ie0ec13ba56c813ffc5a62c3013f32221061ae94d
Signed-off-by: Elyes HAOUAS 
---
M src/drivers/spi/adesto.c
M src/drivers/spi/amic.c
M src/drivers/spi/atmel.c
M src/drivers/spi/eon.c
M src/drivers/spi/gigadevice.c
M src/drivers/spi/macronix.c
M src/drivers/spi/spansion.c
M src/drivers/spi/spi_flash.c
M src/drivers/spi/spi_flash_internal.h
M src/drivers/spi/spi_winbond.h
M src/drivers/spi/sst.c
M src/drivers/spi/stmicro.c
M src/drivers/spi/winbond.c
M src/include/spi_flash.h
14 files changed, 37 insertions(+), 162 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/45092/4

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/45092 )

Change subject: src/drivers/spi:  Use common 'SPI_OPCODE_*'
......................................................................

Abandoned

Merge Conflict