Hello Felix Singer, Nico Huber, Arthur Heymans, Patrick Rudolph,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/48415
to review the following change.
Change subject: nb/intel/sandybridge: Introduce `dmi_update_lanes` function ......................................................................
nb/intel/sandybridge: Introduce `dmi_update_lanes` function
This eliminates redundancy in the DMI recipe function.
Change-Id: I14d8d99eb3077a000dbb4239191e7c3475613b95 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/early_dmi.c 1 file changed, 15 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/48415/1
diff --git a/src/northbridge/intel/sandybridge/early_dmi.c b/src/northbridge/intel/sandybridge/early_dmi.c index 307f2a3..ab16c6b 100644 --- a/src/northbridge/intel/sandybridge/early_dmi.c +++ b/src/northbridge/intel/sandybridge/early_dmi.c @@ -20,6 +20,12 @@ dmi_update_field(offset + (i << 5), mask, val, shift); }
+static void dmi_update_lanes(const u32 offset, const u32 mask, const u32 val, const u8 shift) +{ + for (int i = 0; i < 4; i++) + dmi_update_field(offset + (i << 4), mask, val, shift); +} + static void set_load_bus(const int lane, u32 load_sel, u32 load_data, const u8 stepping) { u32 lbcvalue = stepping == IVB_STEP_A0 ? 0x30000000 : 0x70000000; @@ -36,7 +42,6 @@ const u8 stepping = cpuid & 0xf;
u32 value; - int i;
/* DMI recipe is only valid for Ivy Bridge */ if (!IS_IVY_CPU(cpuid)) @@ -47,10 +52,8 @@ dmi_update_bundles(0x0914, 1, 1, 31);
/* UneqMM steps */ - for (i = 0; i < 4; i++) { - dmi_update_field(0x0a00 + (i << 4), 3, 0, 26); - dmi_update_field(0x0a04 + (i << 4), 1, 1, 11); - } + dmi_update_lanes(0x0a00, 3, 0, 26); + dmi_update_lanes(0x0a04, 1, 1, 11);
/* DFEFIX */ dmi_update_field(0x0c30, 0xf, 4, 28); @@ -78,7 +81,7 @@ dmi_update_field(0x0c08, 0x3f, 8, 4);
/* forcectleopamp */ - for (i = 0; i < 4; i++) { + for (int i = 0; i < 4; i++) { set_load_bus(i, 0x2f, 0x40, stepping); set_load_bus(i, 0x38, 0x40, stepping); } @@ -102,8 +105,7 @@ dmi_update_bundles(0x0910, 0xf, 0, 10);
/* setVrefAdap */ - for (i = 0; i < 4; i++) - dmi_update_field(0x0a00 + (i << 4), 0x1f, 12, 1); + dmi_update_lanes(0x0a00, 0x1f, 12, 1);
/* setbypscmcode */ value = stepping >= IVB_STEP_C0 ? 0 : 1; @@ -111,8 +113,7 @@
/* setctleoc */ value = stepping >= IVB_STEP_C0 ? 1 : 0; - for (i = 0; i < 4; i++) - dmi_update_field(0x0a04 + (i << 4), 1, value, 12); + dmi_update_lanes(0x0a04, 1, value, 12);
if (stepping >= IVB_STEP_C0) { /* setdfelsbsel */ @@ -122,8 +123,7 @@ dmi_update_bundles(0x0908, 3, 2, 27);
/* setagcacqlen */ - for (i = 0; i < 4; i++) - dmi_update_field(0x0a00 + (i << 4), 3, 2, 17); + dmi_update_lanes(0x0a00, 3, 2, 17);
/* setsampleratspeedcal */ dmi_update_bundles(0x0700, 1, 1, 3); @@ -132,8 +132,7 @@ dmi_update_bundles(0x0904, 3, 1, 10);
/* setdfesumctl */ - for (i = 0; i < 4; i++) - dmi_update_field(0x0a00 + (i << 4), 3, 3, 24); + dmi_update_lanes(0x0a00, 3, 3, 24); }
/* setrxvcmdssel */ @@ -185,10 +184,8 @@ * afeln0cfg0_d1f0.useerrd * FIXME: PEG only */ - if (stepping >= IVB_STEP_D0) { - for (i = 0; i < 4; i++) - dmi_update_field(0x0a00 + (i << 4), 1, 1, 21); - } + if (stepping >= IVB_STEP_D0) + dmi_update_lanes(0x0a00, 1, 1, 21);
/* DMIBAR D0 */ dmi_update_field(0x0258, 1, 1, 29);
Hello Felix Singer, build bot (Jenkins), Nico Huber, Arthur Heymans, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48415
to look at the new patch set (#3).
Change subject: nb/intel/sandybridge: Introduce `dmi_update_lanes` function ......................................................................
nb/intel/sandybridge: Introduce `dmi_update_lanes` function
This eliminates redundancy in the DMI recipe function. The order in which these registers are programmed does not seem to matter, as long as all registers end up with the correct values and are consistent.
Tested on Asus P8Z77-V LX2, still boots with Ivy Bridge E1 CPU.
Change-Id: I14d8d99eb3077a000dbb4239191e7c3475613b95 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/northbridge/intel/sandybridge/early_dmi.c 1 file changed, 15 insertions(+), 18 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/48415/3
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/48415 )
Change subject: nb/intel/sandybridge: Introduce `dmi_update_lanes` function ......................................................................
Abandoned
Unreviewable
-
Angel Pons (Code Review)