Change in coreboot[master]: soc/intel/tigerlake: Enable TC Cold support - coreboot-gerrit

11 Jan 2021


      Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Nick Vaccaro, Srinidhi N Kaushik, Raj Astekar, Patrick Rudolph.
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49244 )
Change subject: soc/intel/tigerlake: Enable TC Cold support
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Patch Set 3:
(1 comment)
File src/soc/intel/tigerlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/49244/comment/e9ecc78f_03984bb2 
PS3, Line 137: Enable
...
Is this enable or disable? The UPD is Disable...
It disables TCCold. The updated fsp is by default with DisableTccoldOnUsbConneced=0 (enable).
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I0ad0322693b4f8fbf1000b24eb21dddcebec686b
Gerrit-Change-Number: 49244
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