Change in coreboot[master]: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power u...
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage
BRANCH=none BUG=b:138152075 TEST=Build for cometlake board with the PmTimerDisabled policy in devicetree set to 1.
With PmTimerDisabled = 0
iotools mmio_read8 0xfe0018fc
0x00
With PmTimerDisabled = 1
iotools mmio_read8 0xfe0018fc
0x02
Bit 1: ACPI Timer Disable (ACPI_TIM_DIS): This bit determines whether the ACPI Timer is enabled to run. - 0: ACPI Timer is enabled - 1: ACPI Timer is disabled
Change-Id: I83f49505a804c99d7978e5d541ea9fe8ead9b88f Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/34611/1
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 6ff90f8..eb4be43 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -47,6 +47,8 @@ # Unlock GPIO pads register "PchUnlockGpioPads" = "1"
+ register "PmTimerDisabled" = "1" + # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS |
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
Patch Set 2: Code-Review+2
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
Patch Set 2: Code-Review+2
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
Patch Set 2: Code-Review+2
Hello Aamir Bohra, V Sowmya, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34611
to look at the new patch set (#3).
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage
BRANCH=none BUG=b:138152075 TEST=Build for cometlake board with the PmTimerDisabled policy in devicetree set to 1.
With PmTimerDisabled = 0
iotools mmio_read8 0xfe0018fc
0x00
With PmTimerDisabled = 1
iotools mmio_read8 0xfe0018fc
0x02
Bit 1: ACPI Timer Disable (ACPI_TIM_DIS): This bit determines whether the ACPI Timer is enabled to run. - 0: ACPI Timer is enabled - 1: ACPI Timer is disabled
Change-Id: I83f49505a804c99d7978e5d541ea9fe8ead9b88f Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/34611/3
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
Patch Set 3:
fix rebase issue in order to merge, lost +2 in mean time
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
Patch Set 3: Code-Review+2
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
Patch Set 3: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
Patch Set 3: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
Patch Set 3: -Code-Review
Subrata Banik has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/34611 )
Change subject: mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage ......................................................................
mb/google/hatch: Enable PmTimerDisabled config to reduce S0ix power usage
BRANCH=none BUG=b:138152075 TEST=Build for cometlake board with the PmTimerDisabled policy in devicetree set to 1.
With PmTimerDisabled = 0
iotools mmio_read8 0xfe0018fc
0x00
With PmTimerDisabled = 1
iotools mmio_read8 0xfe0018fc
0x02
Bit 1: ACPI Timer Disable (ACPI_TIM_DIS): This bit determines whether the ACPI Timer is enabled to run. - 0: ACPI Timer is enabled - 1: ACPI Timer is disabled
Change-Id: I83f49505a804c99d7978e5d541ea9fe8ead9b88f Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/34611 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aamir Bohra aamir.bohra@intel.com Reviewed-by: V Sowmya v.sowmya@intel.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Aamir Bohra: Looks good to me, approved V Sowmya: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 14630a4..00198a5 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -52,6 +52,8 @@ # putting it under register "common_soc_config" in overridetree.cb file. register "common_soc_config.pch_thermal_trip" = "77"
+ register "PmTimerDisabled" = "1" + # VR Settings Configuration for 4 Domains #+----------------+-------+-------+-------+-------+ #| Domain/Setting | SA | IA | GTUS | GTS |
-
Aamir Bohra (Code Review) -
Furquan Shaikh (Code Review)
-
Subrata Banik (Code Review)
-
V Sowmya (Code Review)