Hello Iru Cai,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/44066
to review the following change.
Change subject: cpu/intel/haswell: add Crystal Well CPU IDs ......................................................................
cpu/intel/haswell: add Crystal Well CPU IDs
Change-Id: Ife4ae71fd977d32d7b11ee7e2a1a7e2ec3eec52f Signed-off-by: Iru Cai mytbk920423@gmail.com --- M src/cpu/intel/haswell/haswell_init.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/44066/1
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index e621638..5f3debb 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -778,6 +778,8 @@ { X86_VENDOR_INTEL, 0x306c3 }, /* Intel Haswell C0 */ { X86_VENDOR_INTEL, 0x40650 }, /* Intel Haswell ULT B0 */ { X86_VENDOR_INTEL, 0x40651 }, /* Intel Haswell ULT B1 */ + { X86_VENDOR_INTEL, 0x40660 }, /* Intel Crystal Well C0 */ + { X86_VENDOR_INTEL, 0x40661 }, /* Intel Crystal Well C1 */ { 0, 0 }, };
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44066 )
Change subject: cpu/intel/haswell: add Crystal Well CPU IDs ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44066 )
Change subject: cpu/intel/haswell: add Crystal Well CPU IDs ......................................................................
cpu/intel/haswell: add Crystal Well CPU IDs
Change-Id: Ife4ae71fd977d32d7b11ee7e2a1a7e2ec3eec52f Signed-off-by: Iru Cai mytbk920423@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44066 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/intel/haswell/haswell_init.c 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index e621638..5f3debb 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -778,6 +778,8 @@ { X86_VENDOR_INTEL, 0x306c3 }, /* Intel Haswell C0 */ { X86_VENDOR_INTEL, 0x40650 }, /* Intel Haswell ULT B0 */ { X86_VENDOR_INTEL, 0x40651 }, /* Intel Haswell ULT B1 */ + { X86_VENDOR_INTEL, 0x40660 }, /* Intel Crystal Well C0 */ + { X86_VENDOR_INTEL, 0x40661 }, /* Intel Crystal Well C1 */ { 0, 0 }, };
Attention is currently required from: Iru Cai.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44066 )
Change subject: cpu/intel/haswell: add Crystal Well CPU IDs ......................................................................
Patch Set 2:
(1 comment)
File src/cpu/intel/haswell/haswell_init.c:
https://review.coreboot.org/c/coreboot/+/44066/comment/1e939024_329270bf PS2, Line 782: { X86_VENDOR_INTEL, 0x40661 }, /* Intel Crystal Well C1 */ Don't we need microcode for these?
Attention is currently required from: Iru Cai.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44066 )
Change subject: cpu/intel/haswell: add Crystal Well CPU IDs ......................................................................
Patch Set 2:
(1 comment)
File src/cpu/intel/haswell/haswell_init.c:
https://review.coreboot.org/c/coreboot/+/44066/comment/dd5a5a08_c3244032 PS2, Line 782: { X86_VENDOR_INTEL, 0x40661 }, /* Intel Crystal Well C1 */
Don't we need microcode for these?
CB:67525