Change in coreboot[master]: soc/intel: Allow enable/disable ME via CMOS - coreboot-gerrit

11 Nov 2021


      Attention is currently required from: Sean Rhodes, SRIDHAR SIRICILLA, Furquan Shaikh, Paul Menzel, Rizwan Qureshi, Subrata Banik, Sridhar Siricilla, Arthur Heymans, Evgeny Zinoviev, Patrick Rudolph, Felix Held.
Tim Crawford has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52800 )
Change subject: soc/intel: Allow enable/disable ME via CMOS
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Patch Set 85:
(1 comment)
File src/soc/intel/common/block/cse/cse.c:
https://review.coreboot.org/c/coreboot/+/52800/comment/47931640_ceba9a2c 
PS85, Line 1062: 		uint32_t rule_id;
When setting to Normal mode, the reply does not have a rule_id.
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I374db3b7c0ded71cdc18f27970252fec7220cc20
Gerrit-Change-Number: 52800
Gerrit-PatchSet: 85
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