Change in ...coreboot[master]: util/superiontool/aspeed: Dumps SUC Registers

[Christian Walter (Code Review)]

Christian Walter has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33192


Change subject: util/superiontool/aspeed: Dumps SUC Registers
......................................................................

util/superiontool/aspeed: Dumps SUC Registers

Change-Id: I3413bc92d579968843c7619400db09a52b95da59
Signed-off-by: Christian Walter <[e-mail]>
---
M util/superiotool/aspeed.c
1 file changed, 59 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/33192/1

diff --git a/util/superiotool/aspeed.c b/util/superiotool/aspeed.c
index 5c2fc4c..89f436b 100644
--- a/util/superiotool/aspeed.c
+++ b/util/superiotool/aspeed.c
@@ -18,6 +18,10 @@
 
 #define DEVICE_SCRATCH_REG	0x21
 
+#define AST2400_CONFIG_INDEX	0x4e
+#define AST2400_CONFIG_DATA	0x4f
+#define AST2400_SUC_BASE_ADDRESS	0x1e6e2000
+
 static const struct superio_registers reg_table[] = {
 	{0x00, "AST2400", {
 		{NOLDN, NULL,
@@ -73,6 +77,60 @@
 	OUTB(0xaa, port);
 }
 
+static void dump_suc_registers()
+{
+	uint32_t data;
+	uint8_t tmp;
+
+	enter_conf_mode_ast(AST2400_CONFIG_INDEX);
+
+	outb(0x7, AST2400_CONFIG_INDEX);
+	outb(0xd, AST2400_CONFIG_DATA);
+
+	for (uint16_t i = 0; i < 0xFF; i += 4)
+	{
+		/* Set Address */
+
+		outb(0xf0, AST2400_CONFIG_INDEX);
+		outb(((AST2400_SUC_BASE_ADDRESS + i) & 0xFF000000) >> 24, AST2400_CONFIG_DATA);
+
+		outb(0xf1, AST2400_CONFIG_INDEX);
+		outb(((AST2400_SUC_BASE_ADDRESS + i) & 0x00FF0000) >> 16, AST2400_CONFIG_DATA);
+
+		outb(0xf2, AST2400_CONFIG_INDEX);
+		outb(((AST2400_SUC_BASE_ADDRESS + i) & 0x0000FF00) >> 8, AST2400_CONFIG_DATA);
+
+		outb(0xf3, AST2400_CONFIG_INDEX);
+		outb(((AST2400_SUC_BASE_ADDRESS + i) & 0x000000FF), AST2400_CONFIG_DATA);
+
+		/* Set Mode to four Bytes */
+		outb(0xf8, AST2400_CONFIG_INDEX);
+		tmp = inb(AST2400_CONFIG_DATA);
+		outb((tmp & 0xfc) | 0x02, AST2400_CONFIG_DATA);
+
+		/* Fire Request */
+		outb(0xfe, AST2400_CONFIG_INDEX);
+		tmp = inb(AST2400_CONFIG_DATA);
+
+		/* Read back data */
+		outb(0xf4, AST2400_CONFIG_INDEX);
+		data = inb(AST2400_CONFIG_DATA) << 24;
+
+		outb(0xf5, AST2400_CONFIG_INDEX);
+		data |= inb(AST2400_CONFIG_DATA) << 16;
+
+		outb(0xf6, AST2400_CONFIG_INDEX);
+		data |= inb(AST2400_CONFIG_DATA) << 8;
+
+		outb(0xf7, AST2400_CONFIG_INDEX);
+		data |= inb(AST2400_CONFIG_DATA);
+
+		/* Dump val */
+		printf("Address %08x\t%08x", (AST2400_SUC_BASE_ADDRESS + i), data);
+	}
+
+}
+
 static int detect_ast_pci(void)
 {
 	int i;
@@ -142,6 +200,7 @@
 	enter_conf_mode_ast(port);
 	dump_superio("Aspeed", reg_table, port, chip_id, LDN_SEL);
 	exit_conf_mode_ast(port);
+	dump_suc_registers();
 }
 
 void print_aspeed_chips(void)

-- 
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3413bc92d579968843c7619400db09a52b95da59
Gerrit-Change-Number: 33192
Gerrit-PatchSet: 1
Gerrit-Owner: Christian Walter <[e-mail]>
Gerrit-MessageType: newchange