Change in coreboot[master]: mb/intel/adlrvp: Enable ADL_MAINBOARD_SUPPORTS_PCIEXP_HOTPLUG

[Tim Wawrzynczak (Code Review)]

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/51461 )

Change subject: mb/intel/adlrvp: Enable ADL_MAINBOARD_SUPPORTS_PCIEXP_HOTPLUG
......................................................................

mb/intel/adlrvp: Enable ADL_MAINBOARD_SUPPORTS_PCIEXP_HOTPLUG

This change select the Kconfig to pre-allocate the Intel-recommended bus
and memory resources per-PCIe TBT root port for the adlrvp mainboard.

Signed-off-by: Tim Wawrzynczak 
Change-Id: Ic56ebab02e50a466662a07d122d8f40eaf16b54b
---
M src/mainboard/intel/adlrvp/Kconfig
1 file changed, 1 insertion(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/51461/1

diff --git a/src/mainboard/intel/adlrvp/Kconfig b/src/mainboard/intel/adlrvp/Kconfig
index 295b56f..1326bb6 100644
--- a/src/mainboard/intel/adlrvp/Kconfig
+++ b/src/mainboard/intel/adlrvp/Kconfig
@@ -2,6 +2,7 @@

config BOARD_SPECIFIC_OPTIONS
    def_bool y
+	select ADL_MAINBOARD_SUPPORTS_PCIEXP_HOTPLUG
    select BOARD_ROMSIZE_KB_32768
    select HAVE_ACPI_RESUME
    select HAVE_ACPI_TABLES
@@ -84,21 +85,6 @@
    select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC if VBOOT
 endchoice

-config PCIEXP_HOTPLUG
-	default y
-
-config PCIEXP_HOTPLUG_BUSES
-	int
-	default 42
-
-config PCIEXP_HOTPLUG_MEM
-	hex
-	default 0xc200000  # 194 MiB
-
-config PCIEXP_HOTPLUG_PREFETCH_MEM
-	hex
-	default 0x1c000000 # 448 MiB
-
 config VBOOT
    select VBOOT_LID_SWITCH
    select VBOOT_MOCK_SECDATA