[M] Change in coreboot[main]: soc/mediatek/mt8196: Initialize MCUPM

[Yidi Lin (Code Review)]

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu.

Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85888?usp=email )

Change subject: soc/mediatek/mt8196: Initialize MCUPM
......................................................................

Patch Set 1:

(5 comments)

File src/soc/mediatek/mt8196/mcupm.c:

https://review.coreboot.org/c/coreboot/+/85888/comment/70520645_e0a660c0?usp... :
PS1, Line 9: #include <stdlib.h>
what is this for ?

https://review.coreboot.org/c/coreboot/+/85888/comment/9d0a787f_6a7ba31f?usp... :
PS1, Line 34: set
Set

https://review.coreboot.org/c/coreboot/+/85888/comment/641ff05a_dabc23c2?usp... :
PS1, Line 42: polling
Poll

https://review.coreboot.org/c/coreboot/+/85888/comment/19ada850_2fef478f?usp... :
PS1, Line 39: 	/* set CPUEB_STATE_VALID = 1 */
            : 	setbits32p(SPM_MCUPM_SPMC_CON, CPUEB_STATE_VALID);
            : 
            : 	/* polling CPUEB_STATE_FINISH_ACK = 1 */
            : 	if (!retry(POLLING_ACK_TIME,
            : 		   (read32p(SPM_MCUPM_SPMC_CON) & CPUEB_STATE_FINISH_ACK) ==
            : 		   CPUEB_STATE_FINISH_ACK, udelay(1))) {
            : 		printk(BIOS_WARNING,
            : 		       "[EB_SPMC] Polling ACK timeout, %#x\n",
            : 		       read32p(SPM_MCUPM_SPMC_CON));
            : 		return -1;
            : 	}
            : 
            : 	/* set CPUEB_STATE_VALID = 0 */
            : 	clrbits32p(SPM_MCUPM_SPMC_CON, CPUEB_STATE_VALID);
            : 
            : 	/* polling CPUEB_STATE_FINISH_ACK = 0 */
            : 	if (!retry(POLLING_ACK_TIME,
            : 		   (read32p(SPM_MCUPM_SPMC_CON) & CPUEB_STATE_FINISH_ACK) !=
            : 		   CPUEB_STATE_FINISH_ACK, udelay(1))) {
            : 		printk(BIOS_WARNING,
            : 		       "[EB_SPMC] Polling ACK timeout, %#x\n",
            : 		       read32p(SPM_MCUPM_SPMC_CON));
            : 		return -1;
            : 	}
Create a function to set value to `SPM_MCUPM_SPMC_CON`
```
static int xxxxx(uint32_t val)
{
    clrsetbits32p(SPM_MCUPM_SPMC_CON, CPUEB_STATE_VALID, val);

/* polling CPUEB_STATE_FINISH_ACK = 0 */
    if (!retry(POLLING_ACK_TIME,
    	   (read32p(SPM_MCUPM_SPMC_CON) & CPUEB_STATE_FINISH_ACK) !=
    	   CPUEB_STATE_FINISH_ACK, udelay(1))) {
    	printk(BIOS_WARNING,
    	       "[EB_SPMC] Polling ACK timeout, %#x\n",
    	       read32p(SPM_MCUPM_SPMC_CON));
    	return -1;
    }
}
```

https://review.coreboot.org/c/coreboot/+/85888/comment/db52cffd_c7db571e?usp... :
PS1, Line 101: MCUPM_CFGREG_SW_RSTN_SW_RSTN | MCUPM_CFGREG_SW_RSTN_DMA_BUSY_MASK);
move to next line and align with first param.