Joel Linn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81426?usp=email )
Change subject: superio/ite: Add special fan vectors and further options ......................................................................
superio/ite: Add special fan vectors and further options
A number of ITE SIOs support "special fan control vectors", which effectively allow non-linear fan speed control. This is for example used by the vendor firmware of the "HP Pro 3500 Series".
The 3VSBSW# signal can now also be disabled again which is necessary to power components down properly in SMM when entering S5.
By implementing `u8 cpu_get_temp_offset(void)` a mb port can supply the maximum junction temperature at runtime which is specific to the cpu and required to configure PECI offsets automatically. Other ports hardcode this value because they have no socketed cpu.
A function to disable the PME# output was added as well.
Change-Id: I93df2b5652fc3fde775b6161fa5bebc4a34d5e94 Signed-off-by: Joel Linn jl@conductive.de --- M src/superio/ite/Makefile.mk M src/superio/ite/common/Kconfig M src/superio/ite/common/early_serial.c M src/superio/ite/common/env_ctrl.c M src/superio/ite/common/env_ctrl.h M src/superio/ite/common/env_ctrl_chip.h M src/superio/ite/common/ite.h A src/superio/ite/common/mainboard_impl.h M src/superio/ite/it8728f/Kconfig M src/superio/ite/it8772f/Kconfig 10 files changed, 147 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/81426/1
diff --git a/src/superio/ite/Makefile.mk b/src/superio/ite/Makefile.mk index b6d0199..d44ade4 100644 --- a/src/superio/ite/Makefile.mk +++ b/src/superio/ite/Makefile.mk @@ -7,6 +7,9 @@ ## include generic ite environment controller driver ramstage-$(CONFIG_SUPERIO_ITE_ENV_CTRL) += common/env_ctrl.c
+## include generic ite driver to smm to control S3-relevant functions +smm-$(CONFIG_SUPERIO_ITE_COMMON_PRE_RAM) += common/early_serial.c + subdirs-y += it8528e subdirs-y += it8613e subdirs-y += it8623e diff --git a/src/superio/ite/common/Kconfig b/src/superio/ite/common/Kconfig index 36c1496..aefda46 100644 --- a/src/superio/ite/common/Kconfig +++ b/src/superio/ite/common/Kconfig @@ -48,4 +48,14 @@ Temperature can be read to any TMPIN from an external sensor via SST/PECI (instead of TMPIN3 only).
+config SUPERIO_ITE_ENV_CTRL_FAN_VECTOR + bool + help + Special fan control that will assist the smart control + +config SUPERIO_ITE_ENV_CTRL_FAN_VECTOR_RANGED + bool + help + Range and negative slope support + endif diff --git a/src/superio/ite/common/early_serial.c b/src/superio/ite/common/early_serial.c index 552f110..ff7deaa 100644 --- a/src/superio/ite/common/early_serial.c +++ b/src/superio/ite/common/early_serial.c @@ -15,6 +15,7 @@ #define ITE_CONFIG_REG_WATCHDOG 0x72 /* watchdog config */ #define ITE_CONFIG_REG_WDT_TIMEOUT_LSB 0x73 /* watchdog timeout (LSB) */ #define ITE_CONFIG_REG_WDT_TIMEOUT_MSB 0x74 /* watchdog timeout (MSB) */ +#define ITE_CONFIG_REG_APC_PME_CTL1 0xf2 /* APC_PME Control 1 */ #define ITE_CONFIG_REG_APC_PME_CTL2 0xf4 /* APC_PME Control 2 */
/* Helper procedure */ @@ -75,6 +76,7 @@ * * LDN 7, reg 0x2a - needed for S3, or memory power will be cut off * this was documented only in IT8712F_V0.9.2! + * Also documented in IT8728F_V0.4.2 and IT8772E_V0.4 * * Enable 3VSBSW#. (For System Suspend-to-RAM) * 0: 3VSBSW# will be always inactive. @@ -85,13 +87,16 @@ * and pass: GPIO_DEV */
-void ite_enable_3vsbsw(pnp_devfn_t dev) +void ite_set_3vsbsw(pnp_devfn_t dev, bool enable) { u8 tmp; pnp_enter_conf_state(dev); pnp_set_logical_device(dev); tmp = pnp_read_config(dev, ITE_CONFIG_REG_MFC); - tmp |= 0x80; + if (enable) + tmp |= 0x80; + else + tmp &= ~0x80; pnp_write_config(dev, ITE_CONFIG_REG_MFC, tmp); pnp_exit_conf_state(dev); } @@ -139,6 +144,21 @@ }
/* + * Disable PME# Output + * pass EC_DEV + */ +void ite_pme_out_disable(pnp_devfn_t dev) +{ + u8 tmp; + pnp_enter_conf_state(dev); + pnp_set_logical_device(dev); + tmp = pnp_read_config(dev, ITE_CONFIG_REG_APC_PME_CTL1); + tmp |= 0x40; + pnp_write_config(dev, ITE_CONFIG_REG_APC_PME_CTL1, tmp); + pnp_exit_conf_state(dev); +} + +/* * Set AC resume to be up to the Southbridge * pass EC_DEV */ diff --git a/src/superio/ite/common/env_ctrl.c b/src/superio/ite/common/env_ctrl.c index bf68a74..029b8cd 100644 --- a/src/superio/ite/common/env_ctrl.c +++ b/src/superio/ite/common/env_ctrl.c @@ -7,6 +7,7 @@
#include "env_ctrl.h" #include "env_ctrl_chip.h" +#include "mainboard_impl.h"
static void extemp_force_idle_status(const u16 base) { @@ -121,7 +122,11 @@ reg = pnp_read_hwm5_index(base, ITE_EC_BEEP_ENABLE); reg |= ITE_EC_TEMP_ADJUST_WRITE_ENABLE; pnp_write_hwm5_index(base, ITE_EC_BEEP_ENABLE, reg); - pnp_write_hwm5_index(base, ITE_EC_TEMP_ADJUST[tmpin-1], conf->offset); + u8 offset = conf->offset; + if (offset == CPU_TJ_MAX_OFFSET) { + offset = cpu_get_temp_offset(); + } + pnp_write_hwm5_index(base, ITE_EC_TEMP_ADJUST[tmpin-1], offset); }
/* Set temperature limits */ @@ -255,6 +260,43 @@ } }
+#if CONFIG(SUPERIO_ITE_ENV_CTRL_FAN_VECTOR) +static void enable_fan_vector(const u16 base, const u8 fan_vector, + const struct ite_ec_fan_vector_config *const conf) +{ + u8 reg; + + u8 start = conf->tmp_start; + if (!start) + start = 0xff; + pnp_write_hwm5_index(base, ITE_EC_FAN_VEC_CTL_LIMIT_START(fan_vector), start); + + s8 slope = conf->slope; + bool slope_neg = slope < 0; + if (slope <= -128) + reg = 127; + else if (slope_neg) + reg = -slope; + else + reg = slope; + reg |= ITE_EC_FAN_VEC_CTL_TMPIN0(conf->tmpin); + pnp_write_hwm5_index(base, ITE_EC_FAN_VEC_CTL_SLOPE(fan_vector), reg); + + reg = ITE_EC_FAN_VEC_CTL_DELTA_TEMP_INTRVL(conf->tmp_delta); + reg |= ITE_EC_FAN_VEC_CTL_FANOUT(conf->fanout); + reg |= ITE_EC_FAN_VEC_CTL_TMPIN1(conf->tmpin); + pnp_write_hwm5_index(base, ITE_EC_FAN_VEC_CTL_DELTA(fan_vector), reg); + + if (CONFIG(SUPERIO_ITE_ENV_CTRL_FAN_VECTOR_RANGED)) { + reg = conf->tmp_range & 0x7f; + reg |= ITE_EC_FAN_VEC_CTL_SLOPESIGN(slope_neg); + pnp_write_hwm5_index(base, ITE_EC_FAN_VEC_CTL_RANGE(fan_vector), reg); + } else if (slope_neg) { + printk(BIOS_WARNING, "Unsupported negative slope on fan vector control\n"); + } +} +#endif + static void enable_beeps(const u16 base, const struct ite_ec_config *const conf) { u8 reg = 0; @@ -320,6 +362,12 @@ for (i = 0; i < ITE_EC_FAN_CNT; ++i) enable_fan(base, i + 1, &conf->fan[i]);
+#if CONFIG(SUPERIO_ITE_ENV_CTRL_FAN_VECTOR) + /* Enable Special FAN Vector X if configured */ + for (i = 0; i < ITE_EC_FAN_VECTOR_CNT; ++i) + enable_fan_vector(base, i, &conf->fan_vector[i]); +#endif + /* Enable beeps if configured */ enable_beeps(base, conf);
@@ -332,3 +380,10 @@ if (conf->tmpin[i].mode == THERMAL_PECI) extemp_force_idle_status(base); } + +__weak u8 cpu_get_temp_offset(void) +{ + printk(BIOS_WARNING, + "CPU_TJ_MAX_OFFSET used but not implemented. Falling back to 127\n"); + return 127; +} diff --git a/src/superio/ite/common/env_ctrl.h b/src/superio/ite/common/env_ctrl.h index 5a31e7c..d540931 100644 --- a/src/superio/ite/common/env_ctrl.h +++ b/src/superio/ite/common/env_ctrl.h @@ -199,6 +199,17 @@ #define ITE_EC_FAN_CTL_TARGET_ZONE(x) (0x66 + ((x)-1) * 8) #define ITE_EC_FAN_CTL_TARGET_ZONE_MASK 0x0f
+#define ITE_EC_FAN_VEC_CTL_LIMIT_START(x) (0x90 + (x) * 4) +#define ITE_EC_FAN_VEC_CTL_SLOPE(x) (0x91 + (x) * 4) +#define ITE_EC_FAN_VEC_CTL_DELTA(x) (0x92 + (x) * 4) +#define ITE_EC_FAN_VEC_CTL_RANGE(x) (0x93 + (x) * 4) + +#define ITE_EC_FAN_VEC_CTL_TMPIN0(x) (((x) & 0x1) << 7) +#define ITE_EC_FAN_VEC_CTL_TMPIN1(x) (((x) & 0x2) << 6) +#define ITE_EC_FAN_VEC_CTL_DELTA_TEMP_INTRVL(c) ITE_EC_FAN_CTL_DELTA_TEMP_INTRVL(c) +#define ITE_EC_FAN_VEC_CTL_FANOUT(x) (((x) & 0x3) << 5) +#define ITE_EC_FAN_VEC_CTL_SLOPESIGN(x) (((x) & 0x1) << 7) + #define ITE_EC_EXTEMP_STATUS 0x88 #define ITE_EC_EXTEMP_STATUS_HOST_BUSY (1 << 0) #define ITE_EC_EXTEMP_ADDRESS 0x89 diff --git a/src/superio/ite/common/env_ctrl_chip.h b/src/superio/ite/common/env_ctrl_chip.h index 2bb0780..2a574b3 100644 --- a/src/superio/ite/common/env_ctrl_chip.h +++ b/src/superio/ite/common/env_ctrl_chip.h @@ -11,6 +11,8 @@ #define ITE_EC_FAN_CNT 3 #endif
+#define ITE_EC_FAN_VECTOR_CNT 2 /* A, B */ + /* Supported thermal mode on TMPINx */ enum ite_ec_thermal_mode { THERMAL_MODE_DISABLED = 0, @@ -69,6 +71,17 @@ struct ite_ec_fan_smartconfig smart; };
+/* Special fan control modes that will assist smart control */ +struct ite_ec_fan_vector_config { + u8 tmpin; /* select TMPINx (1, 2 or 3) */ + u8 fanout; /* select FANx (1, 2 or 3) */ + u8 tmp_start; + u8 tmp_delta; + u8 tmp_range; /* restrict the range of the vector function, + 0x00 to disable */ + s8 slope; +}; + struct ite_ec_config { /* * Enable reading of voltage pins VINx. @@ -85,6 +98,13 @@ */ struct ite_ec_fan_config fan[ITE_EC_FAN_CNT];
+#if CONFIG(SUPERIO_ITE_ENV_CTRL_FAN_VECTOR) + /* + * Enable special FAN vector control. + */ + struct ite_ec_fan_vector_config fan_vector[ITE_EC_FAN_VECTOR_CNT]; +#endif + bool tmpin_beep; bool fan_beep; bool vin_beep; @@ -111,4 +131,9 @@ #define FAN4 ec.fan[3] #define FAN5 ec.fan[4]
+#define FAN_VECA ec.fan_vector[0] +#define FAN_VECB ec.fan_vector[1] + +#define CPU_TJ_MAX_OFFSET 0xFF + #endif /* SUPERIO_ITE_ENV_CTRL_CHIP_H */ diff --git a/src/superio/ite/common/ite.h b/src/superio/ite/common/ite.h index 19ade4b..ace4e01 100644 --- a/src/superio/ite/common/ite.h +++ b/src/superio/ite/common/ite.h @@ -4,6 +4,7 @@ #define SUPERIO_ITE_COMMON_PRE_RAM_H
#include <device/pnp_type.h> +#include <stdbool.h> #include <stdint.h>
#define ITE_UART_CLK_PREDIVIDE_48 0x00 /* default */ @@ -14,11 +15,16 @@
/* Some boards need to init wdt+gpio's very early */ void ite_reg_write(pnp_devfn_t dev, u8 reg, u8 value); -void ite_enable_3vsbsw(pnp_devfn_t dev); +void ite_set_3vsbsw(pnp_devfn_t dev, bool enable); void ite_delay_pwrgd3(pnp_devfn_t dev); void ite_kill_watchdog(pnp_devfn_t dev); +void ite_pme_out_disable(pnp_devfn_t dev); void ite_ac_resume_southbridge(pnp_devfn_t dev);
+/* Alias for backwards compatibility */ +#define ite_enable_3vsbsw(dev) ite_set_3vsbsw((dev), true) +#define ite_disable_3vsbsw(dev) ite_set_3vsbsw((dev), false) + void pnp_enter_conf_state(pnp_devfn_t dev); void pnp_exit_conf_state(pnp_devfn_t dev);
diff --git a/src/superio/ite/common/mainboard_impl.h b/src/superio/ite/common/mainboard_impl.h new file mode 100644 index 0000000..07c6aa8 --- /dev/null +++ b/src/superio/ite/common/mainboard_impl.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef SUPERIO_ITE_COMMON_MAINBOARD_IMPL_H +#define SUPERIO_ITE_COMMON_MAINBOARD_IMPL_H + +#include <stdint.h> + +u8 cpu_get_temp_offset(void); + +#endif /* SUPERIO_ITE_COMMON_MAINBOARD_IMPL_H */ diff --git a/src/superio/ite/it8728f/Kconfig b/src/superio/ite/it8728f/Kconfig index 2f9be8d..6e459e8 100644 --- a/src/superio/ite/it8728f/Kconfig +++ b/src/superio/ite/it8728f/Kconfig @@ -9,3 +9,4 @@ select SUPERIO_ITE_ENV_CTRL_5FANS select SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN + select SUPERIO_ITE_ENV_CTRL_FAN_VECTOR diff --git a/src/superio/ite/it8772f/Kconfig b/src/superio/ite/it8772f/Kconfig index 3b4180e..acbe1a0 100644 --- a/src/superio/ite/it8772f/Kconfig +++ b/src/superio/ite/it8772f/Kconfig @@ -7,4 +7,6 @@ select SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG select SUPERIO_ITE_ENV_CTRL_8BIT_PWM select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN + select SUPERIO_ITE_ENV_CTRL_FAN_VECTOR + select SUPERIO_ITE_ENV_CTRL_FAN_VECTOR_RANGED select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2
-
Joel Linn (Code Review)