Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier.
Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/75590?usp=email )
Change subject: soc/amd/picasso/acpi: move remaining parts of sb_pic0_fch.asl to soc.asl ......................................................................
soc/amd/picasso/acpi: move remaining parts of sb_pic0_fch.asl to soc.asl
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I785abfc90c99b58c11d57847573f550fcea1f774 --- D src/soc/amd/picasso/acpi/sb_pci0_fch.asl M src/soc/amd/picasso/acpi/soc.asl 2 files changed, 2 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/75590/1
diff --git a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl b/src/soc/amd/picasso/acpi/sb_pci0_fch.asl deleted file mode 100644 index ead676d..0000000 --- a/src/soc/amd/picasso/acpi/sb_pci0_fch.asl +++ /dev/null @@ -1,8 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -/* System Bus */ -/* _SB.PCI0 */ - -/* 0:14.3 - LPC */ -#include <soc/amd/common/acpi/lpc.asl> -#include <soc/amd/common/acpi/platform.asl> diff --git a/src/soc/amd/picasso/acpi/soc.asl b/src/soc/amd/picasso/acpi/soc.asl index 82c2766..0b520e4 100644 --- a/src/soc/amd/picasso/acpi/soc.asl +++ b/src/soc/amd/picasso/acpi/soc.asl @@ -9,7 +9,8 @@ #include "northbridge.asl"
/* Describe the AMD Fusion Controller Hub */ - #include "sb_pci0_fch.asl" + #include <soc/amd/common/acpi/lpc.asl> + #include <soc/amd/common/acpi/platform.asl> }
/* PCI IRQ mapping for the Southbridge */