the following patch was just integrated into master: commit 7522dc3c072b9ef09363afd6a699cdb0564f9865 Author: Duncan Laurie dlaurie@chromium.org Date: Tue May 10 20:20:16 2016 -0700
nau8825: Add driver for I2C codec
The Nuvoton NAU8825 audio codec is an I2C device that has a number of tunable parameters that can be provided to the kernel device driver for basic configuration and optimal operation.
The configuration options are exposed to devicetree as registers and then presented as Device Properties via ACPI to the operation system.
This sample configuration in devicetree:
device pci 19.2 on chip drivers/i2c/nau8825 register "irq" = "IRQ_LEVEL_LOW(GPP_F10_IRQ)" register "jkdet_enable" = "1" register "sar_threshold_num" = "2" register "sar_threshold[0]" = "0x0c" register "sar_threshold[1]" = "0x1c" device i2c 1a on end end end
Will generate the following code in the SSDT, trimmed for this commit message as there are more properties that can be configured:
Scope (_SB.PCI0.I2C4) { Name (_HID, "10508825") Name (_UID, Zero) Name (_DDN, "Nuvoton NAU8825 Codec") Method (_STA) { Return (0xF) } Name (_CRS, ResourceTemplate () { I2cSerialBus (0x1A, ControllerInitiated, 0x61A80, AddressingMode7Bit, "_SB.PCI0.I2C4", 0, ResourceConsumer) Interrupt (ResourceConsumer, Level, ActiveLow) { 0x3A } }) Name (_DSD, Package () { ToUUID ("daffd814-6eba-4d8c-8a91-bc9bff4aa301"), Package () { Package () { "nuvoton,jkdet-enable", 1 }, Package () { "nuvoton,sar-threshold-num", 2 }, Package () { "nuvoton,sar-threshold", Package () { 0x0c, 0x1c } } } }) }
Signed-off-by: Duncan Laurie dlaurie@chromium.org Change-Id: I480d72daf5ac3dded9b1cbb5fbc737b9dfde3834 Reviewed-on: https://review.coreboot.org/15015 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin adurbin@chromium.org
See https://review.coreboot.org/15015 for details.
-gerrit