Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56212 )
Change subject: intel/kblrvp: Move lockdown config to baseboard devicetree ......................................................................
intel/kblrvp: Move lockdown config to baseboard devicetree
Clean up lockdown configuration and move it to the baseboard's devicetree.
Since most of the mainboards use `CHIPSET_LOCKDOWN_COREBOOT`, use it for the rvp8 variant for consistency as well.
Built intel/rvp11 with `BUILD_TIMELESS=1` and coreboot.rom remains identical. intel/rvp8 changes, as expected.
Change-Id: I78e847c321c61c3a974b26f30bc2823ff84df651 Signed-off-by: Felix Singer felixsinger@posteo.net Reviewed-on: https://review.coreboot.org/c/coreboot/+/56212 Reviewed-by: Michael Niewöhner foss@mniewoehner.de Reviewed-by: Subrata Banik subrata.banik@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb M src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb M src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb 4 files changed, 4 insertions(+), 15 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb index e17c8b7..a5a51bf 100644 --- a/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb +++ b/src/mainboard/intel/kblrvp/variants/baseboard/devicetree.cb @@ -110,6 +110,10 @@ # Send an extra VR mailbox command for the PS4 exit issue register "SendVrMbxCmd" = "2"
+ register "common_soc_config" = "{ + .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, + }" + device cpu_cluster 0 on device lapic 0 on end end diff --git a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb index fa13674..bc4a677 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp11/overridetree.cb @@ -105,11 +105,6 @@ .tdp_pl2_override = 60, }"
- # Lock Down - register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, - }" - device domain 0 on device pci 04.0 off end # SA thermal subsystem device pci 17.0 on end # SATA diff --git a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb index 397155b..b1d2917 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp3/overridetree.cb @@ -110,11 +110,6 @@ [PchSerialIoIndexUart2] = PchSerialIoSkipInit, \ }"
- # Lock Down - register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, - }" - device domain 0 on device pci 05.0 on end # SA IMGU device pci 14.3 on end # Camera diff --git a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb index b677a34..83a86ad 100644 --- a/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb +++ b/src/mainboard/intel/kblrvp/variants/rvp7/overridetree.cb @@ -150,11 +150,6 @@ # Use default SD card detect GPIO configuration register "sdcard_cd_gpio" = "GPP_G5"
- # Lock Down - register "common_soc_config" = "{ - .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, - }" - device cpu_cluster 0 on device lapic 0 on end end
-
Michael Niewöhner (Code Review)