Patch set updated for coreboot: soc/intel/apollolake: Enable ACPI PM timer emulation on all CPUs

[Andrey Petrov]

Andrey Petrov ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17663

-gerrit

commit c031415b9ca7396a20177d334750a4f91fed31db
Author: Andrey Petrov 
Date:   Wed Nov 30 16:05:56 2016 -0800

soc/intel/apollolake: Enable ACPI PM timer emulation on all CPUs

Currently we enable ACPI PM timer emulation only on BSP. So the timer
    doesn't work on other cores and that breaks OSes that use it. Also,
    microcode uses this information to figure out ACPI IO base, and that
    is used for other features. This patch enables ACPI timer emulation
    on all the logical CPUs.

BUG=chrome-os-partner:60011
    TEST=iotools rdmsr x 0x121, x={0..3}, make sure it is set

Change-Id: I0d6cb8761c1c25d3a2fcf59a49c1eda9e4ccc70c
    Signed-off-by: Andrey Petrov 
---
 src/soc/intel/apollolake/cpu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/soc/intel/apollolake/cpu.c b/src/soc/intel/apollolake/cpu.c
index 916d7c5..85121f0 100644
--- a/src/soc/intel/apollolake/cpu.c
+++ b/src/soc/intel/apollolake/cpu.c
@@ -49,6 +49,14 @@ static const struct reg_script core_msr_script[] = {
     */
    REG_MSR_RMW(MSR_FEATURE_CONFIG, ~FEATURE_CONFIG_RESERVED_MASK,
    	FEATURE_CONFIG_LOCK),
+	/*
+	 * Enable ACPI PM timer emulation, which also lets microcode know
+	 * location of ACPI_PMIO_BASE, that it turns allows other features
+	 * to work.
+	 */
+	REG_MSR_WRITE(MSR_EMULATE_PM_TMR,
+		(((3579545ULL << 32) / CTC_FREQ) << 32) | EMULATE_PM_TMR_EN |
+		(ACPI_PMIO_BASE + R_ACPI_PM1_TMR)),
    REG_SCRIPT_END
 };