Change in coreboot[master]: soc/amd/picasso: Allow end range entry for max device ID in IVRS

[Aamir Bohra (Code Review)]

Attention is currently required from: Jason Glenesk, Marshall Dawson, Paul Menzel, Aamir Bohra, Felix Held.
Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, ritul guru, Marshall Dawson, Jason Glenesk, Felix Held,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/55816

to look at the new patch set (#4).

Change subject: soc/amd/picasso: Allow end range entry for max device ID in IVRS
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soc/amd/picasso: Allow end range entry for max device ID in IVRS

Allow hot plug devices to subscribe to IOMMU services. Currently the
IOMMU end range is limited to device B:0 D:1f F:6. This prevents the
devices on bus 1 and higher to subscribe to IOMMU services. As per AMD
IOMMU spec v3 section 5.2.2.1 all possible device IDs must be defined,
whether the device ID is actually populated or not. Device entries are
used to report ranges when hot-plug and SR-IOV devices are possible.
With this change the hot plug devices can now bind to IOMMU services
(as tested on kernel v5.4), and below errors are not seen in dmesg.

AMD-Vi: Event logged [IO_PAGE_FAULT device=04:00.3 domain=0x0000]

AMD-Vi: Event logged [IO_PAGE_FAULT device=05:00.0 domain=0x0000]

AMD-Vi: Event logged [IO_PAGE_FAULT device=04:00.4 domain=0x0000]

TEST= Verify dGPU can enumerate on hotplug. No IO page fault errors seen.
      The hot plug devices can successfully bind to IOMMU services in
      kernel.

Signed-off-by: Aamir Bohra 
Change-Id: I256c0f8032662674a4d75746de49c250e341c579
---
M src/soc/amd/picasso/agesa_acpi.c
1 file changed, 6 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/55816/4