Attention is currently required from: Bora Guvendik, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Wonkyu Kim.
Hello Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik, Wonkyu Kim, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/84872?usp=email
to look at the new patch set (#9).
The following approvals got outdated and were removed: Code-Review+1 by Jayvik Desai, Verified+1 by build bot (Jenkins)
Change subject: soc/intel/pantherlake: Inject CSE TS into CBMEM timestamp table ......................................................................
soc/intel/pantherlake: Inject CSE TS into CBMEM timestamp table
Get boot performance timestamps from CSE and inject them into CBMEM timestamp table.
990:CSME ROM started execution 0 992:ESE completed AUnit loading 0 944:CSE sent 'Boot Stall Done' to PMC 174,000 945:CSE started to handle ICC configuration 274,000 (100,000) 946:CSE sent 'Host BIOS Prep Done' to PMC 274,000 (0) 947:CSE received 'CPU Reset Done Ack sent' from PMC 448,000 (174,000) 0:1st timestamp 556,874 (108,874)
BUG=b:376218080 TEST=Able to see TS elapse prior to IA reset on Fatcat
Signed-off-by: Bora Guvendik bora.guvendik@intel.com Change-Id: Ie7716b8c371b82c13da1b0217dce1a16e7b95cee --- M src/soc/intel/common/block/cse/Kconfig M src/soc/intel/common/block/include/intelblocks/cse_telemetry.h A src/soc/intel/common/block/include/intelblocks/cse_telemetry_v4.h M src/soc/intel/pantherlake/cse_telemetry.c 4 files changed, 52 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/84872/9