Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33212
Change subject: mb/google/hatch: Increase RW_LEGACY to 1M for 16MB BIOS ......................................................................
mb/google/hatch: Increase RW_LEGACY to 1M for 16MB BIOS
The RW_LEGACY section needs to be minimum 1M. For the 16MB BIOS region, we had this region set too small, which was causing the firmware_FMap FAFT test to fail.
BUG=b:133857135 BRANCH=None TEST=test_that -b hatch <IP> firmware_FMap
Change-Id: Ie6311613ca3bb08e7f058a41d12f9a1153dc9c5e Signed-off-by: Shelley Chen shchen@google.com --- M src/mainboard/google/hatch/chromeos-16MiB.fmd 1 file changed, 9 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/33212/1
diff --git a/src/mainboard/google/hatch/chromeos-16MiB.fmd b/src/mainboard/google/hatch/chromeos-16MiB.fmd index 1594ab3..eb92bb0 100644 --- a/src/mainboard/google/hatch/chromeos-16MiB.fmd +++ b/src/mainboard/google/hatch/chromeos-16MiB.fmd @@ -4,17 +4,17 @@ SI_ME@0x1000 0x3ff000 } SI_BIOS@0x400000 0xc00000 { - RW_SECTION_A@0x0 0x380000 { + RW_SECTION_A@0x0 0x368000 { VBLOCK_A@0x0 0x10000 - FW_MAIN_A(CBFS)@0x10000 0x36ffc0 - RW_FWID_A@0x37ffc0 0x40 + FW_MAIN_A(CBFS)@0x10000 0x357fc0 + RW_FWID_A@0x367fc0 0x40 } - RW_SECTION_B@0x380000 0x380000 { + RW_SECTION_B@0x368000 0x368000 { VBLOCK_B@0x0 0x10000 - FW_MAIN_B(CBFS)@0x10000 0x36ffc0 - RW_FWID_B@0x37ffc0 0x40 + FW_MAIN_B(CBFS)@0x10000 0x357fc0 + RW_FWID_B@0x367fc0 0x40 } - RW_MISC@0x700000 0x30000 { + RW_MISC@0x6D0000 0x30000 { UNIFIED_MRC_CACHE@0x0 0x20000 { RECOVERY_MRC_CACHE@0x0 0x10000 RW_MRC_CACHE@0x10000 0x10000 @@ -27,7 +27,8 @@ RW_VPD(PRESERVE)@0x28000 0x2000 RW_NVRAM(PRESERVE)@0x2a000 0x6000 } - RW_LEGACY(CBFS)@0x730000 0xd0000 + # RW_LEGACY needs to be minimum of 1MB + RW_LEGACY(CBFS)@0x700000 0x100000 WP_RO@0x800000 0x400000 { RO_VPD(PRESERVE)@0x0 0x4000 RO_SECTION@0x4000 0x3fc000 {
Shelley Chen has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/33212 )
Change subject: mb/google/hatch: Increase RW_LEGACY to 1M for 16MB BIOS ......................................................................
mb/google/hatch: Increase RW_LEGACY to 1M for 16MB BIOS
The RW_LEGACY section needs to be minimum 1M. For the 16MB BIOS region, we had this region set too small, which was causing the firmware_FMap FAFT test to fail.
BUG=b:133857135, b:129464811 BRANCH=None TEST=test_that -b hatch <IP> firmware_FMap
Change-Id: Ie6311613ca3bb08e7f058a41d12f9a1153dc9c5e Signed-off-by: Shelley Chen shchen@google.com --- M src/mainboard/google/hatch/chromeos-16MiB.fmd 1 file changed, 9 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/33212/2
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33212 )
Change subject: mb/google/hatch: Increase RW_LEGACY to 1M for 16MB BIOS ......................................................................
Patch Set 2: Code-Review+2
Shelley Chen has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33212 )
Change subject: mb/google/hatch: Increase RW_LEGACY to 1M for 16MB BIOS ......................................................................
mb/google/hatch: Increase RW_LEGACY to 1M for 16MB BIOS
The RW_LEGACY section needs to be minimum 1M. For the 16MB BIOS region, we had this region set too small, which was causing the firmware_FMap FAFT test to fail.
BUG=b:133857135, b:129464811 BRANCH=None TEST=test_that -b hatch <IP> firmware_FMap
Change-Id: Ie6311613ca3bb08e7f058a41d12f9a1153dc9c5e Signed-off-by: Shelley Chen shchen@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/33212 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Paul Fagerburg pfagerburg@chromium.org --- M src/mainboard/google/hatch/chromeos-16MiB.fmd 1 file changed, 9 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Fagerburg: Looks good to me, approved
diff --git a/src/mainboard/google/hatch/chromeos-16MiB.fmd b/src/mainboard/google/hatch/chromeos-16MiB.fmd index 1594ab3..eb92bb0 100644 --- a/src/mainboard/google/hatch/chromeos-16MiB.fmd +++ b/src/mainboard/google/hatch/chromeos-16MiB.fmd @@ -4,17 +4,17 @@ SI_ME@0x1000 0x3ff000 } SI_BIOS@0x400000 0xc00000 { - RW_SECTION_A@0x0 0x380000 { + RW_SECTION_A@0x0 0x368000 { VBLOCK_A@0x0 0x10000 - FW_MAIN_A(CBFS)@0x10000 0x36ffc0 - RW_FWID_A@0x37ffc0 0x40 + FW_MAIN_A(CBFS)@0x10000 0x357fc0 + RW_FWID_A@0x367fc0 0x40 } - RW_SECTION_B@0x380000 0x380000 { + RW_SECTION_B@0x368000 0x368000 { VBLOCK_B@0x0 0x10000 - FW_MAIN_B(CBFS)@0x10000 0x36ffc0 - RW_FWID_B@0x37ffc0 0x40 + FW_MAIN_B(CBFS)@0x10000 0x357fc0 + RW_FWID_B@0x367fc0 0x40 } - RW_MISC@0x700000 0x30000 { + RW_MISC@0x6D0000 0x30000 { UNIFIED_MRC_CACHE@0x0 0x20000 { RECOVERY_MRC_CACHE@0x0 0x10000 RW_MRC_CACHE@0x10000 0x10000 @@ -27,7 +27,8 @@ RW_VPD(PRESERVE)@0x28000 0x2000 RW_NVRAM(PRESERVE)@0x2a000 0x6000 } - RW_LEGACY(CBFS)@0x730000 0xd0000 + # RW_LEGACY needs to be minimum of 1MB + RW_LEGACY(CBFS)@0x700000 0x100000 WP_RO@0x800000 0x400000 { RO_VPD(PRESERVE)@0x0 0x4000 RO_SECTION@0x4000 0x3fc000 {
-
Paul Fagerburg (Code Review) -
Shelley Chen (Code Review)