Change in coreboot[master]: sc7280: Limit SPI-NOR size

[Ravi kumar (Code Review)]

Hello Sajida Bhanu,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/47145

to review the following change.

Change subject: sc7280: Limit SPI-NOR size
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sc7280: Limit SPI-NOR size

Limit SPI-NOR size to 8MB.

Change-Id: I31f788b5280636aca3e7e557db3e9ee53320d50d
Signed-off-by: Shaik Sajida Bhanu 
---
M src/drivers/spi/stmicro.c
M src/mainboard/google/herobrine/Kconfig
2 files changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/47145/1

diff --git a/src/drivers/spi/stmicro.c b/src/drivers/spi/stmicro.c
index 4cd8c1b..b02edf6 100644
--- a/src/drivers/spi/stmicro.c
+++ b/src/drivers/spi/stmicro.c
@@ -189,7 +189,7 @@
    {
    	/* N25Q256..1E */
    	.id[0] = STM_ID_N25Q256__1E,
-		.nr_sectors_shift = 13,
+		.nr_sectors_shift = 11,
    },
 };

diff --git a/src/mainboard/google/herobrine/Kconfig b/src/mainboard/google/herobrine/Kconfig
index 92f77db..b92136d 100644
--- a/src/mainboard/google/herobrine/Kconfig
+++ b/src/mainboard/google/herobrine/Kconfig
@@ -14,7 +14,7 @@
    select RTC
    select SOC_QUALCOMM_SC7280
    select SPI_FLASH
-	select SPI_FLASH_WINBOND
+	select SPI_FLASH_STMICRO
    select MAINBOARD_HAS_CHROMEOS

config VBOOT

[Julius Werner (Code Review)]

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47145 )

Change subject: sc7280: Limit SPI-NOR size
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Patch Set 1:

(1 comment)

https://review.coreboot.org/c/coreboot/+/47145/1/src/drivers/spi/stmicro.c 
File src/drivers/spi/stmicro.c:

https://review.coreboot.org/c/coreboot/+/47145/1/src/drivers/spi/stmicro.c@1... 
PS1, Line 192: 		.nr_sectors_shift = 11,
What is this? Are you saying that the existing value for this chip is wrong? Because when the part is called N25Q256 that seems to indicate it is a 256Mbit (32MB) part, and according to my math 13 should then be the correct value here.

[Ravi Kumar Bokka (Code Review)]

Attention is currently required from: Ravi kumar, Julius Werner.
Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47145 )

Change subject: sc7280: Limit SPI-NOR size
......................................................................

Patch Set 10:

(1 comment)

File src/drivers/spi/stmicro.c:

https://review.coreboot.org/c/coreboot/+/47145/comment/60a3fb0a_aae13dc7 
PS1, Line 192: 		.nr_sectors_shift = 11,
> What is this? Are you saying that the existing value for this chip is wrong? Because when the part i […]

Julius, These are the HACK changes for herobrine pre silicon validation. while in bring up, uploaded unfortunately. we are abandoned these changes and moving these change as HACK PATCH in coreboot patch-train:

https://review.coreboot.org/c/coreboot/+/50885/1

[Shelley Chen (Code Review)]

Attention is currently required from: Ravi kumar, Ravi Kumar Bokka, Julius Werner.
Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47145 )

Change subject: sc7280: Limit SPI-NOR size
......................................................................

Patch Set 10:

(1 comment)

File src/drivers/spi/stmicro.c:

https://review.coreboot.org/c/coreboot/+/47145/comment/2aea919b_74633488 
PS1, Line 192: 		.nr_sectors_shift = 11,
> Julius, These are the HACK changes for herobrine pre silicon validation. […]

Ok, sounds good.  Can you please actually abandon this change?

[Ravi Kumar Bokka (Code Review)]

Ravi Kumar Bokka has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/47145 )

Change subject: sc7280: Limit SPI-NOR size
......................................................................

Abandoned

These are the HACK changes for herobrine pre silicon validation. while in bring up, uploaded unfortunately. we are abandoned these changes