Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik.
Rui Zhou has posted comments on this change by Rui Zhou. ( https://review.coreboot.org/c/coreboot/+/84997?usp=email )
Change subject: mb/google/nissa/var/rull: add ssd timeing and modify ssd GPIO pins of rtd3
......................................................................
Patch Set 19:
(1 comment)
File src/mainboard/google/brya/variants/rull/gpio.c:
https://review.coreboot.org/c/coreboot/+/84997/comment/33416674_241e080d?usp... :
PS17, Line 118:
: /* F11 : NC ==> WWAN_PWR_ON */
: PAD_CFG_GPO(GPP_F11, 1, DEEP),
: /* F12 : GSXDOUT ==> WWAN_RST_L */
: PAD_CFG_GPO(GPP_F12, 0, DEEP),
why touching WWAN GPIO pins in this CL?
thanks
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