Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69805 )
Change subject: src/southbridge: Remove unnecessary space after casts ......................................................................
src/southbridge: Remove unnecessary space after casts
Change-Id: Ib82968724696110a8d1655928db5b2a665525d20 Signed-off-by: Elyes Haouas ehaouas@noos.fr --- M src/southbridge/intel/bd82x6x/early_rcba.c M src/southbridge/intel/bd82x6x/sata.c M src/southbridge/intel/common/spi.c M src/southbridge/intel/i82801ix/sata.c M src/southbridge/intel/i82801jx/sata.c M src/southbridge/intel/ibexpeak/setup_heci_uma.c 6 files changed, 30 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/69805/1
diff --git a/src/southbridge/intel/bd82x6x/early_rcba.c b/src/southbridge/intel/bd82x6x/early_rcba.c index 49c137a..9daf497 100644 --- a/src/southbridge/intel/bd82x6x/early_rcba.c +++ b/src/southbridge/intel/bd82x6x/early_rcba.c @@ -76,7 +76,7 @@ /* Enable IOAPIC (generic) */ RCBA16(OIC) = 0x0100; /* PCH BWG says to read back the IOAPIC enable register */ - (void) RCBA16(OIC); + (void)RCBA16(OIC); }
void southbridge_rcba_config(void) diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c index e243c97..9dc58fd 100644 --- a/src/southbridge/intel/bd82x6x/sata.c +++ b/src/southbridge/intel/bd82x6x/sata.c @@ -142,8 +142,8 @@ write32(abar + 0x00, reg32); /* PI (Ports implemented) */ write32(abar + 0x0c, config->sata_port_map); - (void) read32(abar + 0x0c); /* Read back 1 */ - (void) read32(abar + 0x0c); /* Read back 2 */ + (void)read32(abar + 0x0c); /* Read back 1 */ + (void)read32(abar + 0x0c); /* Read back 2 */ /* CAP2 (HBA Capabilities Extended)*/ reg32 = read32(abar + 0x24); reg32 &= ~0x00000002; diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 44d283c..1d274e8 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -158,7 +158,7 @@ u8 v = read8(addr);
printk(BIOS_DEBUG, "read %2.2x from %4.4x\n", - v, ((unsigned int) addr & 0xffff) - 0xf020); + v, ((unsigned int)addr & 0xffff) - 0xf020); return v; }
@@ -167,7 +167,7 @@ u16 v = read16(addr);
printk(BIOS_DEBUG, "read %4.4x from %4.4x\n", - v, ((unsigned int) addr & 0xffff) - 0xf020); + v, ((unsigned int)addr & 0xffff) - 0xf020); return v; }
@@ -176,7 +176,7 @@ u32 v = read32(addr);
printk(BIOS_DEBUG, "read %8.8x from %4.4x\n", - v, ((unsigned int) addr & 0xffff) - 0xf020); + v, ((unsigned int)addr & 0xffff) - 0xf020); return v; }
@@ -184,21 +184,21 @@ { write8(addr, b); printk(BIOS_DEBUG, "wrote %2.2x to %4.4x\n", - b, ((unsigned int) addr & 0xffff) - 0xf020); + b, ((unsigned int)addr & 0xffff) - 0xf020); }
static void writew_(u16 b, void *addr) { write16(addr, b); printk(BIOS_DEBUG, "wrote %4.4x to %4.4x\n", - b, ((unsigned int) addr & 0xffff) - 0xf020); + b, ((unsigned int)addr & 0xffff) - 0xf020); }
static void writel_(u32 b, void *addr) { write32(addr, b); printk(BIOS_DEBUG, "wrote %8.8x to %4.4x\n", - b, ((unsigned int) addr & 0xffff) - 0xf020); + b, ((unsigned int)addr & 0xffff) - 0xf020); }
#else /* CONFIG_DEBUG_SPI_FLASH ^^^ enabled vvv NOT enabled */ @@ -787,8 +787,8 @@ if (addr + len > flash->size) { printk(BIOS_ERR, "Attempt to read %x-%x which is out of chip\n", - (unsigned int) addr, - (unsigned int) addr+(unsigned int) len); + (unsigned int)addr, + (unsigned int)addr+(unsigned int) len); return -1; }
@@ -835,7 +835,7 @@ if ((i % 4) == 0) temp32 = 0;
- temp32 |= ((uint32_t) data[i]) << ((i % 4) * 8); + temp32 |= ((uint32_t)data[i]) << ((i % 4) * 8);
if ((i % 4) == 3) /* 32 bits are full, write them to regs. */ writel_(temp32, cntlr.data + (i - (i % 4))); @@ -856,7 +856,7 @@ if (addr + len > flash->size) { printk(BIOS_ERR, "Attempt to write 0x%x-0x%x which is out of chip\n", - (unsigned int)addr, (unsigned int) (addr+len)); + (unsigned int)addr, (unsigned int)(addr+len)); return -1; }
@@ -890,7 +890,7 @@ len -= block_len; } printk(BIOS_DEBUG, "SF: Successfully written %u bytes @ %#x\n", - (unsigned int) (addr - start), start); + (unsigned int)(addr - start), start); return 0; }
diff --git a/src/southbridge/intel/i82801ix/sata.c b/src/southbridge/intel/i82801ix/sata.c index 260d76a..7621a4d 100644 --- a/src/southbridge/intel/i82801ix/sata.c +++ b/src/southbridge/intel/i82801ix/sata.c @@ -46,8 +46,8 @@ /* PI (Ports implemented) */ write32(abar + 0x0c, port_map); /* PCH code reads back twice, do we need it, too? */ - (void) read32(abar + 0x0c); /* Read back 1 */ - (void) read32(abar + 0x0c); /* Read back 2 */ + (void)read32(abar + 0x0c); /* Read back 1 */ + (void)read32(abar + 0x0c); /* Read back 2 */
/* VSP (Vendor Specific Register) */ reg32 = read32(abar + 0xa0); diff --git a/src/southbridge/intel/i82801jx/sata.c b/src/southbridge/intel/i82801jx/sata.c index 4e01481..1694d3c 100644 --- a/src/southbridge/intel/i82801jx/sata.c +++ b/src/southbridge/intel/i82801jx/sata.c @@ -45,8 +45,8 @@ /* PI (Ports implemented) */ write32(abar + 0x0c, port_map); /* PCH code reads back twice, do we need it, too? */ - (void) read32(abar + 0x0c); /* Read back 1 */ - (void) read32(abar + 0x0c); /* Read back 2 */ + (void)read32(abar + 0x0c); /* Read back 1 */ + (void)read32(abar + 0x0c); /* Read back 2 */
/* VSP (Vendor Specific Register) */ reg32 = read32(abar + 0xa0); diff --git a/src/southbridge/intel/ibexpeak/setup_heci_uma.c b/src/southbridge/intel/ibexpeak/setup_heci_uma.c index e490573..572e5e7 100644 --- a/src/southbridge/intel/ibexpeak/setup_heci_uma.c +++ b/src/southbridge/intel/ibexpeak/setup_heci_uma.c @@ -97,7 +97,7 @@ csr.raw = read32(DEFAULT_HECIBAR + 0xc); } while (csr.csr.buffer_write_ptr == csr.csr.buffer_read_ptr);
- *(u32 *) head = read32(DEFAULT_HECIBAR + 0x8); + *(u32 *)head = read32(DEFAULT_HECIBAR + 0x8); if (!head->length) { write32(DEFAULT_HECIBAR + 0x4, read32(DEFAULT_HECIBAR + 0x4) | 2); *packet_size = 0; @@ -188,7 +188,7 @@ }; u32 reply_size;
- send_heci_message((u8 *) &msg, sizeof(msg), 0, 7); + send_heci_message((u8 *)&msg, sizeof(msg), 0, 7);
reply_size = sizeof(reply); if (recv_heci_message(&reply, &reply_size) == -1)
-
Elyes Haouas (Code Review)