HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
src: Add missing 'include <console/console.h>'
"printk()" needs <console/console.h>.
Change-Id: Iac6b7000bcd8b1335fa3a0ba462a63aed2dc85b8 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/drivers/aspeed/common/ast_mode_corebootfb.c M src/drivers/aspeed/common/ast_post.c M src/lib/asan.c M src/mainboard/emulation/qemu-q35/chromeos.c M src/mainboard/google/hatch/romstage_spd_smbus.c M src/mainboard/google/hatch/variants/baseboard/mainboard.c M src/mainboard/google/hatch/variants/jinlon/mainboard.c M src/mainboard/google/trogdor/mainboard.c M src/mainboard/google/volteer/romstage.c M src/security/vboot/vboot_logic.c M src/soc/amd/picasso/reset.c M src/soc/intel/xeon_sp/cpx/soc_util.c M src/soc/intel/xeon_sp/skx/acpi.c M src/soc/intel/xeon_sp/skx/chip.c M src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h M src/soc/qualcomm/sc7180/clock.c M src/soc/qualcomm/sc7180/qcom_qup_se.c M src/soc/qualcomm/sc7180/qupv3_spi.c M src/southbridge/intel/ibexpeak/early_pch.c 19 files changed, 20 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/45539/1
diff --git a/src/drivers/aspeed/common/ast_mode_corebootfb.c b/src/drivers/aspeed/common/ast_mode_corebootfb.c index b5f794b..bf974ff 100644 --- a/src/drivers/aspeed/common/ast_mode_corebootfb.c +++ b/src/drivers/aspeed/common/ast_mode_corebootfb.c @@ -2,6 +2,8 @@ /* * Copied from Linux drivers/gpu/drm/ast/ast_mode.c */ + +#include <console/console.h> #include <edid.h> #include <device/pci_def.h>
diff --git a/src/drivers/aspeed/common/ast_post.c b/src/drivers/aspeed/common/ast_post.c index c909182..68ecca8 100644 --- a/src/drivers/aspeed/common/ast_post.c +++ b/src/drivers/aspeed/common/ast_post.c @@ -2,6 +2,7 @@
#define COREBOOT_AST_FAILOVER_TIMEOUT 10000000
+#include <console/console.h> #include <delay.h>
#include "ast_drv.h" diff --git a/src/lib/asan.c b/src/lib/asan.c index 6de0de1..cf91111 100644 --- a/src/lib/asan.c +++ b/src/lib/asan.c @@ -8,6 +8,7 @@ * */
+#include <console/console.h> #include <symbols.h> #include <assert.h> #include <arch/symbols.h> diff --git a/src/mainboard/emulation/qemu-q35/chromeos.c b/src/mainboard/emulation/qemu-q35/chromeos.c index fcf50a9..1af2e02 100644 --- a/src/mainboard/emulation/qemu-q35/chromeos.c +++ b/src/mainboard/emulation/qemu-q35/chromeos.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <boot/coreboot_tables.h> +#include <console/console.h> #include <vendorcode/google/chromeos/chromeos.h> #include "../qemu-i440fx/fw_cfg.h"
diff --git a/src/mainboard/google/hatch/romstage_spd_smbus.c b/src/mainboard/google/hatch/romstage_spd_smbus.c index d21e867..e697379 100644 --- a/src/mainboard/google/hatch/romstage_spd_smbus.c +++ b/src/mainboard/google/hatch/romstage_spd_smbus.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h> +#include <console/console.h> #include <soc/cnl_memcfg_init.h> #include <soc/romstage.h> #include <spd_bin.h> diff --git a/src/mainboard/google/hatch/variants/baseboard/mainboard.c b/src/mainboard/google/hatch/variants/baseboard/mainboard.c index 3b247e9..d641405 100644 --- a/src/mainboard/google/hatch/variants/baseboard/mainboard.c +++ b/src/mainboard/google/hatch/variants/baseboard/mainboard.c @@ -2,6 +2,7 @@
#include <baseboard/variants.h> #include <chip.h> +#include <console/console.h> #include <delay.h> #include <device/device.h> #include <device/pci_ids.h> diff --git a/src/mainboard/google/hatch/variants/jinlon/mainboard.c b/src/mainboard/google/hatch/variants/jinlon/mainboard.c index 564c18c..cf9344e 100644 --- a/src/mainboard/google/hatch/variants/jinlon/mainboard.c +++ b/src/mainboard/google/hatch/variants/jinlon/mainboard.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h> +#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <device/device.h> #include <drivers/gfx/generic/chip.h> diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c index 57f3a3b..54d8b0d 100644 --- a/src/mainboard/google/trogdor/mainboard.c +++ b/src/mainboard/google/trogdor/mainboard.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootmode.h> +#include <console/console.h> #include <delay.h> #include <device/device.h> #include <device/i2c_simple.h> diff --git a/src/mainboard/google/volteer/romstage.c b/src/mainboard/google/volteer/romstage.c index 8893785..375bb0c 100644 --- a/src/mainboard/google/volteer/romstage.c +++ b/src/mainboard/google/volteer/romstage.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h> +#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <fsp/soc_binding.h> #include <fw_config.h> diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c index c4c3b4b..43405bc 100644 --- a/src/security/vboot/vboot_logic.c +++ b/src/security/vboot/vboot_logic.c @@ -2,6 +2,7 @@
#include <arch/exception.h> #include <assert.h> +#include <console/console.h> #include <bootmode.h> #include <fmap.h> #include <security/tpm/tspi/crtm.h> diff --git a/src/soc/amd/picasso/reset.c b/src/soc/amd/picasso/reset.c index 902538ff..7a0074c 100644 --- a/src/soc/amd/picasso/reset.c +++ b/src/soc/amd/picasso/reset.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/io.h> +#include <console/console.h> #include <reset.h> #include <soc/pci_devs.h> #include <soc/reset.h> diff --git a/src/soc/intel/xeon_sp/cpx/soc_util.c b/src/soc/intel/xeon_sp/cpx/soc_util.c index 15874c0..f3e47e5 100644 --- a/src/soc/intel/xeon_sp/cpx/soc_util.c +++ b/src/soc/intel/xeon_sp/cpx/soc_util.c @@ -2,6 +2,7 @@
#include <assert.h> #include <commonlib/sort.h> +#include <console/console.h> #include <delay.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c index d984d9f..16f7856 100644 --- a/src/soc/intel/xeon_sp/skx/acpi.c +++ b/src/soc/intel/xeon_sp/skx/acpi.c @@ -7,6 +7,7 @@ #include <intelblocks/acpi.h> #include <device/pci.h> #include <cbmem.h> +#include <console/console.h> #include <cpu/x86/smm.h> #include <soc/acpi.h> #include <soc/cpu.h> diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c index 845d7cb..0316e1e 100644 --- a/src/soc/intel/xeon_sp/skx/chip.c +++ b/src/soc/intel/xeon_sp/skx/chip.c @@ -2,6 +2,7 @@
#include <cbfs.h> #include <assert.h> +#include <console/console.h> #include <post.h> #include <device/pci.h> #include <soc/acpi.h> diff --git a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h index 62aa4d1..e9665c3 100644 --- a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h +++ b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h @@ -3,6 +3,7 @@ #ifndef _SOC_PCI_DEVS_H_ #define _SOC_PCI_DEVS_H_
+#include <console/console.h> #include <device/pci_def.h> #include <hob_iiouds.h>
diff --git a/src/soc/qualcomm/sc7180/clock.c b/src/soc/qualcomm/sc7180/clock.c index 919735d..8763a9d 100644 --- a/src/soc/qualcomm/sc7180/clock.c +++ b/src/soc/qualcomm/sc7180/clock.c @@ -2,6 +2,7 @@
#include <assert.h> #include <commonlib/helpers.h> +#include <console/console.h> #include <delay.h> #include <device/mmio.h> #include <soc/clock.h> diff --git a/src/soc/qualcomm/sc7180/qcom_qup_se.c b/src/soc/qualcomm/sc7180/qcom_qup_se.c index cac590c..6750c3e 100644 --- a/src/soc/qualcomm/sc7180/qcom_qup_se.c +++ b/src/soc/qualcomm/sc7180/qcom_qup_se.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <console/console.h> #include <soc/qcom_qup_se.h>
struct qup qup[12] = { diff --git a/src/soc/qualcomm/sc7180/qupv3_spi.c b/src/soc/qualcomm/sc7180/qupv3_spi.c index d086a27..23914bb 100644 --- a/src/soc/qualcomm/sc7180/qupv3_spi.c +++ b/src/soc/qualcomm/sc7180/qupv3_spi.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <assert.h> +#include <console/console.h> #include <lib.h> #include <soc/clock.h> #include <soc/gpio.h> diff --git a/src/southbridge/intel/ibexpeak/early_pch.c b/src/southbridge/intel/ibexpeak/early_pch.c index d9ac009..122c8e4 100644 --- a/src/southbridge/intel/ibexpeak/early_pch.c +++ b/src/southbridge/intel/ibexpeak/early_pch.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <console/console.h> #include <device/pci_ops.h> #include <device/smbus_host.h> #include <northbridge/intel/ironlake/ironlake.h>
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
Patch Set 1:
Thank you.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
Patch Set 3: Code-Review+1
looks good to me, but needs a rebase
Martin Roth has uploaded a new patch set (#4) to the change originally created by HAOUAS Elyes. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
src: Add missing 'include <console/console.h>'
"printk()" needs <console/console.h>.
Change-Id: Iac6b7000bcd8b1335fa3a0ba462a63aed2dc85b8 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/drivers/aspeed/common/ast_mode_corebootfb.c M src/drivers/aspeed/common/ast_post.c M src/lib/asan.c M src/mainboard/emulation/qemu-q35/chromeos.c M src/mainboard/google/hatch/romstage_spd_smbus.c M src/mainboard/google/hatch/variants/baseboard/mainboard.c M src/mainboard/google/hatch/variants/jinlon/mainboard.c M src/mainboard/google/trogdor/mainboard.c M src/mainboard/google/volteer/romstage.c M src/security/vboot/vboot_logic.c M src/soc/amd/picasso/reset.c M src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h M src/soc/qualcomm/sc7180/clock.c M src/soc/qualcomm/sc7180/qcom_qup_se.c M src/soc/qualcomm/sc7180/qupv3_spi.c M src/southbridge/intel/ibexpeak/early_pch.c 16 files changed, 17 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/45539/4
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
Patch Set 4: Code-Review+2
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45539/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:
https://review.coreboot.org/c/coreboot/+/45539/4/src/mainboard/google/voltee... PS4, Line 4: #include <console/console.h> in this file no printk is used
Marshall Dawson has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
Removed Code-Review+2 by Marshall Dawson marshalldawson3rd@gmail.com
Felix Held has uploaded a new patch set (#5) to the change originally created by HAOUAS Elyes. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
src: Add missing 'include <console/console.h>'
"printk()" needs <console/console.h>.
Change-Id: Iac6b7000bcd8b1335fa3a0ba462a63aed2dc85b8 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/drivers/aspeed/common/ast_mode_corebootfb.c M src/drivers/aspeed/common/ast_post.c M src/lib/asan.c M src/mainboard/emulation/qemu-q35/chromeos.c M src/mainboard/google/hatch/romstage_spd_smbus.c M src/mainboard/google/hatch/variants/baseboard/mainboard.c M src/mainboard/google/hatch/variants/jinlon/mainboard.c M src/mainboard/google/trogdor/mainboard.c M src/security/vboot/vboot_logic.c M src/soc/amd/picasso/reset.c M src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h M src/soc/qualcomm/sc7180/clock.c M src/soc/qualcomm/sc7180/qcom_qup_se.c M src/soc/qualcomm/sc7180/qupv3_spi.c M src/southbridge/intel/ibexpeak/early_pch.c 15 files changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/45539/5
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45539/4/src/mainboard/google/voltee... File src/mainboard/google/volteer/romstage.c:
https://review.coreboot.org/c/coreboot/+/45539/4/src/mainboard/google/voltee... PS4, Line 4: #include <console/console.h>
in this file no printk is used
Done
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
Patch Set 5: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45539 )
Change subject: src: Add missing 'include <console/console.h>' ......................................................................
src: Add missing 'include <console/console.h>'
"printk()" needs <console/console.h>.
Change-Id: Iac6b7000bcd8b1335fa3a0ba462a63aed2dc85b8 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr Reviewed-on: https://review.coreboot.org/c/coreboot/+/45539 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com --- M src/drivers/aspeed/common/ast_mode_corebootfb.c M src/drivers/aspeed/common/ast_post.c M src/lib/asan.c M src/mainboard/emulation/qemu-q35/chromeos.c M src/mainboard/google/hatch/romstage_spd_smbus.c M src/mainboard/google/hatch/variants/baseboard/mainboard.c M src/mainboard/google/hatch/variants/jinlon/mainboard.c M src/mainboard/google/trogdor/mainboard.c M src/security/vboot/vboot_logic.c M src/soc/amd/picasso/reset.c M src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h M src/soc/qualcomm/sc7180/clock.c M src/soc/qualcomm/sc7180/qcom_qup_se.c M src/soc/qualcomm/sc7180/qupv3_spi.c M src/southbridge/intel/ibexpeak/early_pch.c 15 files changed, 16 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Marshall Dawson: Looks good to me, approved
diff --git a/src/drivers/aspeed/common/ast_mode_corebootfb.c b/src/drivers/aspeed/common/ast_mode_corebootfb.c index b5f794b..bf974ff 100644 --- a/src/drivers/aspeed/common/ast_mode_corebootfb.c +++ b/src/drivers/aspeed/common/ast_mode_corebootfb.c @@ -2,6 +2,8 @@ /* * Copied from Linux drivers/gpu/drm/ast/ast_mode.c */ + +#include <console/console.h> #include <edid.h> #include <device/pci_def.h>
diff --git a/src/drivers/aspeed/common/ast_post.c b/src/drivers/aspeed/common/ast_post.c index b6e8e91..e644d91 100644 --- a/src/drivers/aspeed/common/ast_post.c +++ b/src/drivers/aspeed/common/ast_post.c @@ -2,6 +2,7 @@
#define COREBOOT_AST_FAILOVER_TIMEOUT 10000000
+#include <console/console.h> #include <delay.h>
#include "ast_drv.h" diff --git a/src/lib/asan.c b/src/lib/asan.c index 6de0de1..cf91111 100644 --- a/src/lib/asan.c +++ b/src/lib/asan.c @@ -8,6 +8,7 @@ * */
+#include <console/console.h> #include <symbols.h> #include <assert.h> #include <arch/symbols.h> diff --git a/src/mainboard/emulation/qemu-q35/chromeos.c b/src/mainboard/emulation/qemu-q35/chromeos.c index fcf50a9..1af2e02 100644 --- a/src/mainboard/emulation/qemu-q35/chromeos.c +++ b/src/mainboard/emulation/qemu-q35/chromeos.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <boot/coreboot_tables.h> +#include <console/console.h> #include <vendorcode/google/chromeos/chromeos.h> #include "../qemu-i440fx/fw_cfg.h"
diff --git a/src/mainboard/google/hatch/romstage_spd_smbus.c b/src/mainboard/google/hatch/romstage_spd_smbus.c index d21e867..e697379 100644 --- a/src/mainboard/google/hatch/romstage_spd_smbus.c +++ b/src/mainboard/google/hatch/romstage_spd_smbus.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <baseboard/variants.h> +#include <console/console.h> #include <soc/cnl_memcfg_init.h> #include <soc/romstage.h> #include <spd_bin.h> diff --git a/src/mainboard/google/hatch/variants/baseboard/mainboard.c b/src/mainboard/google/hatch/variants/baseboard/mainboard.c index 3b247e9..d641405 100644 --- a/src/mainboard/google/hatch/variants/baseboard/mainboard.c +++ b/src/mainboard/google/hatch/variants/baseboard/mainboard.c @@ -2,6 +2,7 @@
#include <baseboard/variants.h> #include <chip.h> +#include <console/console.h> #include <delay.h> #include <device/device.h> #include <device/pci_ids.h> diff --git a/src/mainboard/google/hatch/variants/jinlon/mainboard.c b/src/mainboard/google/hatch/variants/jinlon/mainboard.c index 564c18c..cf9344e 100644 --- a/src/mainboard/google/hatch/variants/jinlon/mainboard.c +++ b/src/mainboard/google/hatch/variants/jinlon/mainboard.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */
#include <baseboard/variants.h> +#include <console/console.h> #include <ec/google/chromeec/ec.h> #include <device/device.h> #include <drivers/gfx/generic/chip.h> diff --git a/src/mainboard/google/trogdor/mainboard.c b/src/mainboard/google/trogdor/mainboard.c index 57f3a3b..54d8b0d 100644 --- a/src/mainboard/google/trogdor/mainboard.c +++ b/src/mainboard/google/trogdor/mainboard.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootmode.h> +#include <console/console.h> #include <delay.h> #include <device/device.h> #include <device/i2c_simple.h> diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c index 54c8224..70c7d77 100644 --- a/src/security/vboot/vboot_logic.c +++ b/src/security/vboot/vboot_logic.c @@ -2,6 +2,7 @@
#include <arch/exception.h> #include <assert.h> +#include <console/console.h> #include <bootmode.h> #include <fmap.h> #include <security/tpm/tspi/crtm.h> diff --git a/src/soc/amd/picasso/reset.c b/src/soc/amd/picasso/reset.c index 902538ff..7a0074c 100644 --- a/src/soc/amd/picasso/reset.c +++ b/src/soc/amd/picasso/reset.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/io.h> +#include <console/console.h> #include <reset.h> #include <soc/pci_devs.h> #include <soc/reset.h> diff --git a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h index 02df790..429278c 100644 --- a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h +++ b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h @@ -3,6 +3,7 @@ #ifndef _SOC_PCI_DEVS_H_ #define _SOC_PCI_DEVS_H_
+#include <console/console.h> #include <device/pci_def.h> #include <hob_iiouds.h>
diff --git a/src/soc/qualcomm/sc7180/clock.c b/src/soc/qualcomm/sc7180/clock.c index 919735d..8763a9d 100644 --- a/src/soc/qualcomm/sc7180/clock.c +++ b/src/soc/qualcomm/sc7180/clock.c @@ -2,6 +2,7 @@
#include <assert.h> #include <commonlib/helpers.h> +#include <console/console.h> #include <delay.h> #include <device/mmio.h> #include <soc/clock.h> diff --git a/src/soc/qualcomm/sc7180/qcom_qup_se.c b/src/soc/qualcomm/sc7180/qcom_qup_se.c index cac590c..6750c3e 100644 --- a/src/soc/qualcomm/sc7180/qcom_qup_se.c +++ b/src/soc/qualcomm/sc7180/qcom_qup_se.c @@ -1,5 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <console/console.h> #include <soc/qcom_qup_se.h>
struct qup qup[12] = { diff --git a/src/soc/qualcomm/sc7180/qupv3_spi.c b/src/soc/qualcomm/sc7180/qupv3_spi.c index d086a27..23914bb 100644 --- a/src/soc/qualcomm/sc7180/qupv3_spi.c +++ b/src/soc/qualcomm/sc7180/qupv3_spi.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <assert.h> +#include <console/console.h> #include <lib.h> #include <soc/clock.h> #include <soc/gpio.h> diff --git a/src/southbridge/intel/ibexpeak/early_pch.c b/src/southbridge/intel/ibexpeak/early_pch.c index df380c5..f5285c1 100644 --- a/src/southbridge/intel/ibexpeak/early_pch.c +++ b/src/southbridge/intel/ibexpeak/early_pch.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/io.h> +#include <console/console.h> #include <device/pci_ops.h> #include <device/smbus_host.h> #include <northbridge/intel/ironlake/ironlake.h>