Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43099 )
Change subject: sb/intel/lynxpoint: Drop RCBA reg script mechanism ......................................................................
sb/intel/lynxpoint: Drop RCBA reg script mechanism
It is no longer used anywhere. Drop it before it rots.
Change-Id: I4bc3d5bd898058e575144a3c6c3fccb78dcff2e2 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/lynxpoint/Makefile.inc M src/southbridge/intel/lynxpoint/pch.h D src/southbridge/intel/lynxpoint/rcba.c 3 files changed, 1 insertion(+), 91 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/43099/1
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc index fa0ef0b..e3d056d 100644 --- a/src/southbridge/intel/lynxpoint/Makefile.inc +++ b/src/southbridge/intel/lynxpoint/Makefile.inc @@ -22,7 +22,6 @@ ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c endif
-ramstage-y += rcba.c ramstage-y += me_status.c ramstage-y += acpi.c
@@ -34,7 +33,7 @@
bootblock-y += early_pch.c romstage-y += early_usb.c early_smbus.c early_me.c me_status.c early_pch.c -romstage-y += rcba.c pmutil.c +romstage-y += pmutil.c
ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y) romstage-y += lp_gpio.c diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 77377c4..7987486 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -79,46 +79,6 @@ void usb_xhci_sleep_prepare(pci_devfn_t dev, u8 slp_typ); void usb_xhci_route_all(void);
-/* State Machine configuration. */ -#define RCBA_REG_SIZE_MASK 0x8000 -#define RCBA_REG_SIZE_16 0x8000 -#define RCBA_REG_SIZE_32 0x0000 -#define RCBA_COMMAND_MASK 0x000f -#define RCBA_COMMAND_SET 0x0001 -#define RCBA_COMMAND_READ 0x0002 -#define RCBA_COMMAND_RMW 0x0003 -#define RCBA_COMMAND_END 0x0007 - -#define RCBA_ENCODE_COMMAND(command_, reg_, mask_, or_value_) \ - { .command = command_, \ - .reg = reg_, \ - .mask = mask_, \ - .or_value = or_value_ \ - } -#define RCBA_SET_REG_32(reg_, value_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_32|RCBA_COMMAND_SET, reg_, 0, value_) -#define RCBA_READ_REG_32(reg_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_32|RCBA_COMMAND_READ, reg_, 0, 0) -#define RCBA_RMW_REG_32(reg_, mask_, or_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_32|RCBA_COMMAND_RMW, reg_, mask_, or_) -#define RCBA_SET_REG_16(reg_, value_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_16|RCBA_COMMAND_SET, reg_, 0, value_) -#define RCBA_READ_REG_16(reg_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_16|RCBA_COMMAND_READ, reg_, 0, 0) -#define RCBA_RMW_REG_16(reg_, mask_, or_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_16|RCBA_COMMAND_RMW, reg_, mask_, or_) -#define RCBA_END_CONFIG \ - RCBA_ENCODE_COMMAND(RCBA_COMMAND_END, 0, 0, 0) - -struct rcba_config_instruction -{ - u16 command; - u16 reg; - u32 mask; - u32 or_value; -}; - -void pch_config_rcba(const struct rcba_config_instruction *rcba_config); int pch_silicon_revision(void); int pch_silicon_id(void); int pch_silicon_type(void); diff --git a/src/southbridge/intel/lynxpoint/rcba.c b/src/southbridge/intel/lynxpoint/rcba.c deleted file mode 100644 index 9f62cd3..0000000 --- a/src/southbridge/intel/lynxpoint/rcba.c +++ /dev/null @@ -1,49 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/pci_def.h> -#include <device/device.h> -#include <device/pci.h> -#include "pch.h" - -void pch_config_rcba(const struct rcba_config_instruction *rcba_config) -{ - const struct rcba_config_instruction *rc; - u32 value; - - rc = rcba_config; - while (rc->command != RCBA_COMMAND_END) - { - if ((rc->command & RCBA_REG_SIZE_MASK) == RCBA_REG_SIZE_16) { - switch (rc->command & RCBA_COMMAND_MASK) { - case RCBA_COMMAND_SET: - RCBA16(rc->reg) = (u16)rc->or_value; - break; - case RCBA_COMMAND_READ: - (void)RCBA16(rc->reg); - break; - case RCBA_COMMAND_RMW: - value = RCBA16(rc->reg); - value &= rc->mask; - value |= rc->or_value; - RCBA16(rc->reg) = (u16)value; - break; - } - } else { - switch (rc->command & RCBA_COMMAND_MASK) { - case RCBA_COMMAND_SET: - RCBA32(rc->reg) = rc->or_value; - break; - case RCBA_COMMAND_READ: - (void)RCBA32(rc->reg); - break; - case RCBA_COMMAND_RMW: - value = RCBA32(rc->reg); - value &= rc->mask; - value |= rc->or_value; - RCBA32(rc->reg) = value; - break; - } - } - rc++; - } -}
Tristan Corrick has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43099 )
Change subject: sb/intel/lynxpoint: Drop RCBA reg script mechanism ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/43099 )
Change subject: sb/intel/lynxpoint: Drop RCBA reg script mechanism ......................................................................
sb/intel/lynxpoint: Drop RCBA reg script mechanism
It is no longer used anywhere. Drop it before it rots.
Change-Id: I4bc3d5bd898058e575144a3c6c3fccb78dcff2e2 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/43099 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tristan Corrick tristan@corrick.kiwi --- M src/southbridge/intel/lynxpoint/Makefile.inc M src/southbridge/intel/lynxpoint/pch.h D src/southbridge/intel/lynxpoint/rcba.c 3 files changed, 1 insertion(+), 91 deletions(-)
Approvals: build bot (Jenkins): Verified Tristan Corrick: Looks good to me, approved
diff --git a/src/southbridge/intel/lynxpoint/Makefile.inc b/src/southbridge/intel/lynxpoint/Makefile.inc index fa0ef0b..e3d056d 100644 --- a/src/southbridge/intel/lynxpoint/Makefile.inc +++ b/src/southbridge/intel/lynxpoint/Makefile.inc @@ -22,7 +22,6 @@ ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c endif
-ramstage-y += rcba.c ramstage-y += me_status.c ramstage-y += acpi.c
@@ -34,7 +33,7 @@
bootblock-y += early_pch.c romstage-y += early_usb.c early_smbus.c early_me.c me_status.c early_pch.c -romstage-y += rcba.c pmutil.c +romstage-y += pmutil.c
ifeq ($(CONFIG_INTEL_LYNXPOINT_LP),y) romstage-y += lp_gpio.c diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 77377c4..7987486 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -79,46 +79,6 @@ void usb_xhci_sleep_prepare(pci_devfn_t dev, u8 slp_typ); void usb_xhci_route_all(void);
-/* State Machine configuration. */ -#define RCBA_REG_SIZE_MASK 0x8000 -#define RCBA_REG_SIZE_16 0x8000 -#define RCBA_REG_SIZE_32 0x0000 -#define RCBA_COMMAND_MASK 0x000f -#define RCBA_COMMAND_SET 0x0001 -#define RCBA_COMMAND_READ 0x0002 -#define RCBA_COMMAND_RMW 0x0003 -#define RCBA_COMMAND_END 0x0007 - -#define RCBA_ENCODE_COMMAND(command_, reg_, mask_, or_value_) \ - { .command = command_, \ - .reg = reg_, \ - .mask = mask_, \ - .or_value = or_value_ \ - } -#define RCBA_SET_REG_32(reg_, value_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_32|RCBA_COMMAND_SET, reg_, 0, value_) -#define RCBA_READ_REG_32(reg_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_32|RCBA_COMMAND_READ, reg_, 0, 0) -#define RCBA_RMW_REG_32(reg_, mask_, or_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_32|RCBA_COMMAND_RMW, reg_, mask_, or_) -#define RCBA_SET_REG_16(reg_, value_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_16|RCBA_COMMAND_SET, reg_, 0, value_) -#define RCBA_READ_REG_16(reg_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_16|RCBA_COMMAND_READ, reg_, 0, 0) -#define RCBA_RMW_REG_16(reg_, mask_, or_) \ - RCBA_ENCODE_COMMAND(RCBA_REG_SIZE_16|RCBA_COMMAND_RMW, reg_, mask_, or_) -#define RCBA_END_CONFIG \ - RCBA_ENCODE_COMMAND(RCBA_COMMAND_END, 0, 0, 0) - -struct rcba_config_instruction -{ - u16 command; - u16 reg; - u32 mask; - u32 or_value; -}; - -void pch_config_rcba(const struct rcba_config_instruction *rcba_config); int pch_silicon_revision(void); int pch_silicon_id(void); int pch_silicon_type(void); diff --git a/src/southbridge/intel/lynxpoint/rcba.c b/src/southbridge/intel/lynxpoint/rcba.c deleted file mode 100644 index 9f62cd3..0000000 --- a/src/southbridge/intel/lynxpoint/rcba.c +++ /dev/null @@ -1,49 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/pci_def.h> -#include <device/device.h> -#include <device/pci.h> -#include "pch.h" - -void pch_config_rcba(const struct rcba_config_instruction *rcba_config) -{ - const struct rcba_config_instruction *rc; - u32 value; - - rc = rcba_config; - while (rc->command != RCBA_COMMAND_END) - { - if ((rc->command & RCBA_REG_SIZE_MASK) == RCBA_REG_SIZE_16) { - switch (rc->command & RCBA_COMMAND_MASK) { - case RCBA_COMMAND_SET: - RCBA16(rc->reg) = (u16)rc->or_value; - break; - case RCBA_COMMAND_READ: - (void)RCBA16(rc->reg); - break; - case RCBA_COMMAND_RMW: - value = RCBA16(rc->reg); - value &= rc->mask; - value |= rc->or_value; - RCBA16(rc->reg) = (u16)value; - break; - } - } else { - switch (rc->command & RCBA_COMMAND_MASK) { - case RCBA_COMMAND_SET: - RCBA32(rc->reg) = rc->or_value; - break; - case RCBA_COMMAND_READ: - (void)RCBA32(rc->reg); - break; - case RCBA_COMMAND_RMW: - value = RCBA32(rc->reg); - value &= rc->mask; - value |= rc->or_value; - RCBA32(rc->reg) = value; - break; - } - } - rc++; - } -}